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Fix issue with ControlFlowOps and cregbundle and mods to circuit drawer testing #10804

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e9f5af3
Fix override bug and testing
enavarro51 Aug 5, 2023
bf3dfde
Preliminary changes
enavarro51 Aug 7, 2023
b54ac68
Merge branch 'main' into add_expr_to_drawers
enavarro51 Aug 10, 2023
131c899
Merge main
enavarro51 Aug 15, 2023
f77c0e3
First attempts
enavarro51 Aug 15, 2023
aaeea24
Work on x_index
enavarro51 Aug 15, 2023
9f0aba0
Merge branch 'main' into add_expr_to_drawers
enavarro51 Aug 22, 2023
38502e0
Early testing
enavarro51 Aug 25, 2023
1bc3e9a
Merge branch 'main' into add_expr_to_drawers
enavarro51 Aug 28, 2023
2e43bcf
Cleanup getattr
enavarro51 Aug 28, 2023
0fd86e2
Complete adding exprs
enavarro51 Aug 30, 2023
b1bdcda
First fix for cregbundle control flow
enavarro51 Sep 1, 2023
a124a5b
Finish basic cregbundle mods
enavarro51 Sep 3, 2023
e37ccef
Merge branch 'main' into fix_flow_cregbundle
enavarro51 Sep 3, 2023
4891144
Finish all cregbundle except wire_map bug
enavarro51 Sep 3, 2023
25da3db
Move carg check to circuit_vis and change text tests to circuit_drawer
enavarro51 Sep 4, 2023
f636dd2
Move mpl tests to use circuit_drawer and update images for cregbundle…
enavarro51 Sep 5, 2023
71f9847
Change mpl tests to circuit_drawer
enavarro51 Sep 5, 2023
3343dc8
Fix flow_wire_map and tranpile bug
enavarro51 Sep 8, 2023
e75f3f5
Final cleanup
enavarro51 Sep 9, 2023
5212e79
Merge branch 'main' into fix_flow_cregbundle
enavarro51 Sep 9, 2023
9cd6e0e
Missing outputs on mpl tests
enavarro51 Sep 9, 2023
9d7a2e6
Merge branch 'fix_flow_cregbundle' of github.com:enavarro51/qiskit-te…
enavarro51 Sep 9, 2023
85ba619
Fix output
enavarro51 Sep 9, 2023
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4 changes: 4 additions & 0 deletions qiskit/circuit/quantumcircuit.py
Original file line number Diff line number Diff line change
Expand Up @@ -1670,6 +1670,7 @@ def draw(
initial_state: bool = False,
cregbundle: bool = None,
wire_order: list = None,
encoding: str = None,
):
"""Draw the quantum circuit. Use the output parameter to choose the drawing format:

Expand Down Expand Up @@ -1763,6 +1764,8 @@ def draw(
wire_order (list): Optional. A list of integers used to reorder the display
of the bits. The list must have an entry for every bit with the bits
in the range 0 to (``num_qubits`` + ``num_clbits``).
encoding (str): Optional. Sets the encoding preference of the output.
Default: ``sys.stdout.encoding``.

Returns:
:class:`.TextDrawing` or :class:`matplotlib.figure` or :class:`PIL.Image` or
Expand Down Expand Up @@ -1815,6 +1818,7 @@ def draw(
initial_state=initial_state,
cregbundle=cregbundle,
wire_order=wire_order,
encoding=encoding,
)

def size(
Expand Down
29 changes: 29 additions & 0 deletions qiskit/visualization/circuit/circuit_visualization.py
Original file line number Diff line number Diff line change
Expand Up @@ -33,6 +33,8 @@

from qiskit import user_config
from qiskit.utils import optionals as _optionals
from qiskit.converters import circuit_to_dag
from qiskit.circuit import ControlFlowOp
from . import latex as _latex
from . import text as _text
from . import matplotlib as _matplotlib
Expand Down Expand Up @@ -62,6 +64,7 @@ def circuit_drawer(
initial_state=False,
cregbundle=None,
wire_order=None,
encoding=None,
):
"""Draw the quantum circuit. Use the output parameter to choose the drawing format:

Expand Down Expand Up @@ -156,6 +159,8 @@ def circuit_drawer(
wire_order (list): Optional. A list of integers used to reorder the display
of the bits. The list must have an entry for every bit with the bits
in the range 0 to (num_qubits + num_clbits).
encoding (str): Optional. Sets the encoding preference of the output.
Default: ``sys.stdout.encoding``.

Returns:
:class:`TextDrawing` or :class:`matplotlib.figure` or :class:`PIL.Image` or
Expand Down Expand Up @@ -243,6 +248,29 @@ def circuit_drawer(
)
cregbundle = False

def check_carg_in_circuit(circuit):
if cregbundle is False:
return False
dag = circuit_to_dag(circuit)
for node in dag.op_nodes():
if getattr(node.op, "blocks", None):
for block in node.op.blocks:
if check_carg_in_circuit(block) is False:
return False
if node.cargs and node.op.name != "measure" and not isinstance(node.op, ControlFlowOp):
if cregbundle:
warn(
"Cregbundle set to False since an instruction needs to refer"
" to individual classical wire",
RuntimeWarning,
3,
)
return False

return True

cregbundle = check_carg_in_circuit(circuit)

if output == "text":
return _text_circuit_drawer(
circuit,
Expand All @@ -257,6 +285,7 @@ def circuit_drawer(
initial_state=initial_state,
cregbundle=cregbundle,
wire_order=complete_wire_order,
encoding=encoding,
)
elif output == "latex":
image = _latex_circuit_drawer(
Expand Down
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