Discard cache for standard gates in assign_parameters (backport #13557)

[mergify]

Summary

This is an initial fix to #13504, and should precede #13543.

The following commits discard the cached gate when assigning parameters for a standard gate rather than trying to modify the Python object.

Details and comments

A more in-depth fix is present in #13543, but since it is such a big change, we've decided to include this smaller fix to allow more time to re-evaluate our approach.

When retrieving a PackedInstruction from the EquivalenceLibrary during the compose_transforms phase of the BasisTranslator the parameter modifications done in other places are not reflected on the cached gate, therefore leading to issues when running QISKIT_PARALLEL=TRUE due to a modified object reference when calling CircuitData::assign_parameters().

In the case of a standard gate, we were not removing the old cache but instead modifying it in place (which would not result in the expected outcome), while for other gate instances, we rebuild the non-cached item. Now we instead discard the cache in the StandardGate case too, getting rid of the stale shared reference.

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This is an automatic backport of pull request #13557 done by [Mergify](https://mergify.com).

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[Cryoris]

I double checked the original issue (#13504) with this fix on stable/1.3 as well

[coveralls]

Pull Request Test Coverage Report for Build 12294038102

Details

• 6 of 6 (100.0%) changed or added relevant lines in 1 file are covered.
• 4 unchanged lines in 2 files lost coverage.
• Overall coverage increased (+0.02%) to 88.92%

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Files with Coverage Reduction	New Missed Lines	%
crates/accelerate/src/unitary_synthesis.rs	1	92.2%
crates/qasm2/src/lex.rs	3	92.73%

Totals
Change from base Build 12279362746:	0.02%
Covered Lines:	79091
Relevant Lines:	88946

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💛 - Coveralls