Merge pull request #16 from Quarky93/xilinx_vck5000

fix u250 bug
Quarky93 · Jun 4, 2023 · 467036f · 467036f
2 parents e27ea19 + 7d94cc3
commit 467036f
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Showing 3 changed files with 275 additions and 511 deletions.
diff --git a/hw/shells/xilinx_u250/xdma_gen3x8/io.xdc b/hw/shells/xilinx_u250/xdma_gen3x8/io.xdc
@@ -11,38 +11,38 @@ set_property PACKAGE_PIN AM11 [get_ports pcie_refclk_clk_p]
 # -- [PCIE Pins] ---------------------------------------------------------------
 set_property -dict {IOSTANDARD LVCMOS12 PACKAGE_PIN BD21} [get_ports pcie_rstn]
 
-set_property PACKAGE_PIN AN8  [get_ports { pcie_mgt_txn[7] }]
-set_property PACKAGE_PIN AN9  [get_ports { pcie_mgt_txp[7] }]
-set_property PACKAGE_PIN AN3  [get_ports { pcie_mgt_rxn[7] }]
-set_property PACKAGE_PIN AN4  [get_ports { pcie_mgt_rxp[7] }]
-set_property PACKAGE_PIN AM6  [get_ports { pcie_mgt_txn[6] }]
-set_property PACKAGE_PIN AM7  [get_ports { pcie_mgt_txp[6] }]
-set_property PACKAGE_PIN AM1  [get_ports { pcie_mgt_rxn[6] }]
-set_property PACKAGE_PIN AM2  [get_ports { pcie_mgt_rxp[6] }]
-set_property PACKAGE_PIN AL8  [get_ports { pcie_mgt_txn[5] }]
-set_property PACKAGE_PIN AL9  [get_ports { pcie_mgt_txp[5] }]
-set_property PACKAGE_PIN AL3  [get_ports { pcie_mgt_rxn[5] }]
-set_property PACKAGE_PIN AL4  [get_ports { pcie_mgt_rxp[5] }]
-set_property PACKAGE_PIN AK6  [get_ports { pcie_mgt_txn[4] }]
-set_property PACKAGE_PIN AK7  [get_ports { pcie_mgt_txp[4] }]
-set_property PACKAGE_PIN AK1  [get_ports { pcie_mgt_rxn[4] }]
-set_property PACKAGE_PIN AK2  [get_ports { pcie_mgt_rxp[4] }]
-set_property PACKAGE_PIN AJ8  [get_ports { pcie_mgt_txn[3] }]
-set_property PACKAGE_PIN AJ9  [get_ports { pcie_mgt_txp[3] }]
-set_property PACKAGE_PIN AJ3  [get_ports { pcie_mgt_rxn[3] }]
-set_property PACKAGE_PIN AJ4  [get_ports { pcie_mgt_rxp[3] }]
-set_property PACKAGE_PIN AH6  [get_ports { pcie_mgt_txn[2] }]
-set_property PACKAGE_PIN AH7  [get_ports { pcie_mgt_txp[2] }]
-set_property PACKAGE_PIN AH1  [get_ports { pcie_mgt_rxn[2] }]
-set_property PACKAGE_PIN AH2  [get_ports { pcie_mgt_rxp[2] }]
-set_property PACKAGE_PIN AG8  [get_ports { pcie_mgt_txn[1] }]
-set_property PACKAGE_PIN AG9  [get_ports { pcie_mgt_txp[1] }]
-set_property PACKAGE_PIN AG3  [get_ports { pcie_mgt_rxn[1] }]
-set_property PACKAGE_PIN AG4  [get_ports { pcie_mgt_rxp[1] }]
-set_property PACKAGE_PIN AF6  [get_ports { pcie_mgt_txn[0] }]
-set_property PACKAGE_PIN AF7  [get_ports { pcie_mgt_txp[0] }]
-set_property PACKAGE_PIN AF1  [get_ports { pcie_mgt_rxn[0] }]
-set_property PACKAGE_PIN AF2  [get_ports { pcie_mgt_rxp[0] }]
+set_property PACKAGE_PIN AN8 [get_ports { pcie_mgt_txn[7] }]
+set_property PACKAGE_PIN AN9 [get_ports { pcie_mgt_txp[7] }]
+set_property PACKAGE_PIN AN3 [get_ports { pcie_mgt_rxn[7] }]
+set_property PACKAGE_PIN AN4 [get_ports { pcie_mgt_rxp[7] }]
+set_property PACKAGE_PIN AM6 [get_ports { pcie_mgt_txn[6] }]
+set_property PACKAGE_PIN AM7 [get_ports { pcie_mgt_txp[6] }]
+set_property PACKAGE_PIN AM1 [get_ports { pcie_mgt_rxn[6] }]
+set_property PACKAGE_PIN AM2 [get_ports { pcie_mgt_rxp[6] }]
+set_property PACKAGE_PIN AL8 [get_ports { pcie_mgt_txn[5] }]
+set_property PACKAGE_PIN AL9 [get_ports { pcie_mgt_txp[5] }]
+set_property PACKAGE_PIN AL3 [get_ports { pcie_mgt_rxn[5] }]
+set_property PACKAGE_PIN AL4 [get_ports { pcie_mgt_rxp[5] }]
+set_property PACKAGE_PIN AK6 [get_ports { pcie_mgt_txn[4] }]
+set_property PACKAGE_PIN AK7 [get_ports { pcie_mgt_txp[4] }]
+set_property PACKAGE_PIN AK1 [get_ports { pcie_mgt_rxn[4] }]
+set_property PACKAGE_PIN AK2 [get_ports { pcie_mgt_rxp[4] }]
+set_property PACKAGE_PIN AJ8 [get_ports { pcie_mgt_txn[3] }]
+set_property PACKAGE_PIN AJ9 [get_ports { pcie_mgt_txp[3] }]
+set_property PACKAGE_PIN AJ3 [get_ports { pcie_mgt_rxn[3] }]
+set_property PACKAGE_PIN AJ4 [get_ports { pcie_mgt_rxp[3] }]
+set_property PACKAGE_PIN AH6 [get_ports { pcie_mgt_txn[2] }]
+set_property PACKAGE_PIN AH7 [get_ports { pcie_mgt_txp[2] }]
+set_property PACKAGE_PIN AH1 [get_ports { pcie_mgt_rxn[2] }]
+set_property PACKAGE_PIN AH2 [get_ports { pcie_mgt_rxp[2] }]
+set_property PACKAGE_PIN AG8 [get_ports { pcie_mgt_txn[1] }]
+set_property PACKAGE_PIN AG9 [get_ports { pcie_mgt_txp[1] }]
+set_property PACKAGE_PIN AG3 [get_ports { pcie_mgt_rxn[1] }]
+set_property PACKAGE_PIN AG4 [get_ports { pcie_mgt_rxp[1] }]
+set_property PACKAGE_PIN AF6 [get_ports { pcie_mgt_txn[0] }]
+set_property PACKAGE_PIN AF7 [get_ports { pcie_mgt_txp[0] }]
+set_property PACKAGE_PIN AF1 [get_ports { pcie_mgt_rxn[0] }]
+set_property PACKAGE_PIN AF2 [get_ports { pcie_mgt_rxp[0] }]
 # ------------------------------------------------------------------------------
 
 # -- [Satellite Controller Pins] -----------------------------------------------