add spi emulation swd

Signed-off-by: Runcheng Lu <runcheng.lu@hpmicro.com>
RCSN · Jun 30, 2024 · 080250d · 080250d
1 parent cc467b1
commit 080250d
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Showing 8 changed files with 719 additions and 5 deletions.
diff --git a/DAP/Source/DAP.c b/DAP/Source/DAP.c
@@ -396,7 +396,7 @@ static uint32_t DAP_SWJ_Pins(const uint8_t *request, uint8_t *response) {
   return ((6U << 16) | 1U);
 }
 
-
+extern void set_swj_clock_frequency(uint32_t clock);
 // Process SWJ Clock command and prepare response
 //   request:  pointer to request data
 //   response: pointer to response data
@@ -417,7 +417,11 @@ static uint32_t DAP_SWJ_Clock(const uint8_t *request, uint8_t *response) {
     return ((4U << 16) | 1U);
   }
 
+#ifndef USE_SPI_SWD
   Set_Clock_Delay(clock);
+#else
+  set_swj_clock_frequency(clock);
+#endif
 
   *response = DAP_OK;
 #else

diff --git a/projects/hpm5301evklite/CMakeLists.txt b/projects/hpm5301evklite/CMakeLists.txt
@@ -5,10 +5,10 @@ cmake_minimum_required(VERSION 3.13)
 
 set(CONFIG_USB_DEVICE 1)
 set(CONFIG_DMA_MGR 1)
-
+# set(CONFIG_USE_SPI_SWD 1)
 find_package(hpm-sdk REQUIRED HINTS $ENV{HPM_SDK_BASE})
 
-project(hpm5300evklite_jtag_dap)
+project(hpm5300evklite_dap)
 
 # for sync, use cherryusb from cherryDAP instead of hpm sdk middleware
 sdk_compile_definitions(-DCONFIG_USB_HS)
@@ -21,6 +21,13 @@ sdk_src(../../CherryUSB/port/hpm/usb_dc_hpm.c)
 sdk_src(../../CherryUSB/class/cdc/usbd_cdc.c)
 
 
+if(CONFIG_USE_SPI_SWD)
+sdk_compile_definitions(-DUSE_SPI_SWD=1)
+sdk_app_src(SW_DP_SPI.c)
+else()
+sdk_app_src(../../DAP/Source/SW_DP.c)
+endif()
+
 sdk_inc(./)
 sdk_inc(../..)
 sdk_inc(../../CherryRB)
@@ -29,7 +36,7 @@ sdk_inc(../../DAP/Include)
 sdk_app_src(../../dap_main.c)
 sdk_app_src(../../DAP/Source/DAP_vendor.c)
 sdk_app_src(../../DAP/Source/DAP.c)
-sdk_app_src(../../DAP/Source/SW_DP.c)
+
 sdk_app_src(../../DAP/Source/JTAG_DP.c)
 sdk_app_src(../../CherryRB/chry_ringbuffer.c)
 

diff --git a/projects/hpm5301evklite/DAP_config.h b/projects/hpm5301evklite/DAP_config.h
@@ -409,6 +409,7 @@ Configures the DAP Hardware I/O pins for Serial Wire Debug (SWD) mode:
  - SWCLK, SWDIO, nRESET to output mode and set to default high level.
  - TDI, nTRST to HighZ mode (pins are unused in SWD mode).
 */
+#ifndef USE_SPI_SWD
 __STATIC_INLINE void PORT_SWD_SETUP (void) {
 
 
@@ -430,7 +431,9 @@ __STATIC_INLINE void PORT_SWD_SETUP (void) {
     HPM_IOC->PAD[PIN_TMS].PAD_CTL = IOC_PAD_PAD_CTL_PRS_SET(2) | IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1) | IOC_PAD_PAD_CTL_SPD_SET(3);
     HPM_IOC->PAD[PIN_nRESET].PAD_CTL = IOC_PAD_PAD_CTL_PRS_SET(2) | IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1) | IOC_PAD_PAD_CTL_SPD_SET(3);
 }
-
+#else
+void PORT_SWD_SETUP(void);
+#endif
 /** Disable JTAG/SWD I/O Pins.
 Disables the DAP Hardware I/O pins which configures:
  - TCK/SWCLK, TMS/SWDIO, TDI, TDO, nTRST, nRESET to High-Z mode.