Refactor samd21

boards/samr21-xpro/Makefile.include

@@ -1,6 +1,7 @@
 # define the cpu used by SAMR21 Xplained Pro board
 export CPU = samd21
 export CPU_MODEL = samr21x18a
+CFLAGS += -D__SAMR21G18A__
 
 # set default port depending on operating system
 PORT_LINUX ?= /dev/ttyACM0

boards/samr21-xpro/include/periph_conf.h

@@ -105,8 +105,8 @@ extern "C" {
  */
 static const uart_conf_t uart_config[] = {
     /* device, RX pin, TX pin, mux */
-    {&SERCOM0->USART, GPIO_PIN(PA,5), GPIO_PIN(PA,4), GPIO_MUX_D},
-    {&SERCOM5->USART, GPIO_PIN(PA,23), GPIO_PIN(PA,22), GPIO_MUX_D},
+    {&SERCOM0->USART, GPIO_PIN(PA,5),  GPIO_PIN(PA,4),  GPIO_MUX_D, SERCOM_RX_PAD_1, UART_TX_PAD_0},
+    {&SERCOM5->USART, GPIO_PIN(PA,23), GPIO_PIN(PA,22), GPIO_MUX_D, SERCOM_RX_PAD_1, UART_TX_PAD_0},
 };
 
 /* interrupt function name mapping */
@@ -160,34 +160,32 @@ static const pwm_conf_t pwm_config[] = {
 #define SPI_1_EN           1
 
 /*      SPI0             */
-#define SPI_0_DEV          SERCOM4->SPI
-#define SPI_IRQ_0          SERCOM4_IRQn
-#define SPI_0_DOPO         (1)
-#define SPI_0_DIPO         (0)
-
-#define SPI_0_SCLK_DEV     PORT->Group[2]
-#define SPI_0_SCLK_PIN     (18)
-
-#define SPI_0_MISO_DEV     PORT->Group[2]
-#define SPI_0_MISO_PIN     (19)
-
-#define SPI_0_MOSI_DEV     PORT->Group[1]
-#define SPI_0_MOSI_PIN     (30)
+#define SPI_0_DEV           SERCOM4->SPI
+#define SPI_IRQ_0           SERCOM4_IRQn
+#define SPI_0_GCLK_ID       SERCOM4_GCLK_ID_CORE
+/* SPI 0 pin configuration */
+#define SPI_0_SCLK          GPIO_PIN(PC, 18)
+#define SPI_0_SCLK_MUX      GPIO_MUX_F
+#define SPI_0_MISO          GPIO_PIN(PC, 19)
+#define SPI_0_MISO_MUX      GPIO_MUX_F
+#define SPI_0_MISO_PAD      SERCOM_RX_PAD_0
+#define SPI_0_MOSI          GPIO_PIN(PB, 30)
+#define SPI_0_MOSI_MUX      GPIO_MUX_F
+#define SPI_0_MOSI_PAD      SPI_PAD_2_SCK_3
 
 /*      SPI1             */
-#define SPI_1_DEV          SERCOM5->SPI
-#define SPI_IRQ_1          SERCOM5_IRQn
-#define SPI_1_DOPO         (1)
-#define SPI_1_DIPO         (0)
-
-#define SPI_1_SCLK_DEV     PORT->Group[1]
-#define SPI_1_SCLK_PIN     (23)
-
-#define SPI_1_MISO_DEV     PORT->Group[1]
-#define SPI_1_MISO_PIN     (02)
-
-#define SPI_1_MOSI_DEV     PORT->Group[1]
-#define SPI_1_MOSI_PIN     (22)
+#define SPI_1_DEV           SERCOM5->SPI
+#define SPI_IRQ_1           SERCOM5_IRQn
+#define SPI_1_GCLK_ID       SERCOM5_GCLK_ID_CORE
+/* SPI 1 pin configuration */
+#define SPI_1_SCLK          GPIO_PIN(PB, 23)
+#define SPI_1_SCLK_MUX      GPIO_MUX_D
+#define SPI_1_MISO          GPIO_PIN(PB, 02)
+#define SPI_1_MISO_MUX      GPIO_MUX_D
+#define SPI_1_MISO_PAD      SERCOM_RX_PAD_0
+#define SPI_1_MOSI          GPIO_PIN(PB, 22)
+#define SPI_1_MOSI_MUX      GPIO_MUX_D
+#define SPI_1_MOSI_PAD      SPI_PAD_2_SCK_3
 /** @} */
 
 /**
@@ -204,11 +202,13 @@ static const pwm_conf_t pwm_config[] = {
 #define I2C_0_DEV           SERCOM3->I2CM
 #define I2C_0_IRQ           SERCOM3_IRQn
 #define I2C_0_ISR           isr_sercom3
+/* I2C 0 GCLK */
+#define I2C_0_GCLK_ID       SERCOM3_GCLK_ID_CORE
+#define I2C_0_GCLK_ID_SLOW  SERCOM3_GCLK_ID_SLOW
 /* I2C 0 pin configuration */
-#define I2C_0_PORT          (PORT->Group[0])
-#define I2C_SDA             PIN_PA16
-#define I2C_SCL             PIN_PA17
-#define I2C_0_PINS          (PORT_PA16 | PORT_PA17)
+#define I2C_0_SDA           GPIO_PIN(PA, 16)
+#define I2C_0_SCL           GPIO_PIN(PA, 17)
+#define I2C_0_MUX           GPIO_MUX_D
 
 /**
  * @name RTC configuration

cpu/sam21_common/Makefile.include

@@ -1,6 +1,5 @@
-# export the CPU family so we can differentiate between them in the code
-FAM = $(shell echo $(CPU_FAM) | tr 'a-z-' 'A-Z_')
-export CFLAGS += -DCPU_FAM_$(FAM)
+# Define the CPU family so we can differentiate between them in the code
+CFLAGS += -DCPU_FAM_$(shell echo $(CPU_FAM) | tr 'a-z-' 'A-Z_')
 
 # this CPU implementation doesn't use CMSIS initialization
 export CFLAGS += -DDONT_USE_CMSIS_INIT

cpu/sam21_common/include/cmsis/samr21/README.md

@@ -0,0 +1,27 @@
+# CMSIS include files from Atmel for SAMR21
+
+It is unclear which version of ASF was used for the first implementation
+of samr21 (it was called samd21).
+
+Since then the files has been updated using a distribution from Atmel
+Currently we're using sam0/utils/cmsis/samr21 from asf-3.21.0.7z.
+
+## Trailing White Space
+
+Because of the whitespace check (dist/tools/whitespacecheck/check.sh) all
+the trailing white space had to be removed.  Please take this into account
+when comparing to the original ASF distribution.
+
+    find include/ -name '*.h' -exec sed -i 's/\s*$//' '{}' +
+
+## LITTLE_ENDIAN
+
+These include files define `LITTLE_ENDIAN`.  But we think this is wrong.  It
+seems more logical to let the compiler decide in which mode the ARM code is
+to be translated.  In include/machine/endian.h there is already a define of
+`LITTLE_ENDIAN` (and `BIG_ENDIAN`) for a different purpose.
+
+So, we decided to remove the define from the ASF CMSIS files.  The command
+for it (running from this directory) is:
+
+    find include/ -name '*.h' -exec sed -i '/^#define\s\s*LITTLE_ENDIAN/d' '{}' +