Documentation relevant to the designs and examples available on https://github.com/RISCV-on-Microsemi-FPGA.
Handbook and Release Note for the MIV_RV32IMA_L1_AHB soft processor IP core
Handbook and Release Note for the MIV_RV32IMA_L1_AXI soft processor IP core
Handbook and Release Note for the MIV_RV32IMAF_L1_AHB soft processor IP core
This is the handbook for the CoreRISCV_AXI4 processor IP block. CoreRISCV_AXI4 is used in the example hardware designs found on https://github.com/RISCV-on-Microsemi-FPGA.
CoreRISCV_AXI4 is a soft processor implementing the RV32IM ISA and the RISC-V privileged specification v1.9.
This guide explains how to use FlashPro Express (FPExpress) to download CoreRISCV_AXI4 projects to a development kits.
This guide explains how to use SoftConsole V5.0 on Ubuntu to debug firmware.
This document explains in detail how to use a RISC-V on Microsemi PolarFire FPGA. Microsemi PolarFire FPGA: https://www.microsemi.com/products/fpga-soc/design-resources/dev-kits/polarfire/polarfire-eval-kit
This is the user guide for the Creative Develoment board from Future Electronics. It contains pin locations and DDR set up.