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[VectorCombine] Remove requirement for Instructions in shuffleToIdent…
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…ity (llvm#93543)

This removes the check that both operands of the original shuffle are
instructions, which is a relic from a previous version that held more
variables as Instructions.

Change-Id: I2c095ceeb066d98a666952cfc52ddad523c16f2f
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@davemgreen @ronlieb
davemgreen authored and ronlieb committed Jun 19, 2024
1 parent c34caa8 commit e0f78fb
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Showing 2 changed files with 10 additions and 24 deletions.
29 changes: 10 additions & 19 deletions llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -15,9 +15,7 @@ define <8 x i8> @trivial(<8 x i8> %a) {

define <4 x i32> @add_same_operands(<4 x i32> %x) {
; CHECK-LABEL: @add_same_operands(
; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
; CHECK-NEXT: [[ADD:%.*]] = add <4 x i32> [[SHUF]], [[SHUF]]
; CHECK-NEXT: [[REVSHUF:%.*]] = shufflevector <4 x i32> [[ADD]], <4 x i32> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
; CHECK-NEXT: [[REVSHUF:%.*]] = add <4 x i32> [[X:%.*]], [[X]]
; CHECK-NEXT: ret <4 x i32> [[REVSHUF]]
;
%shuf = shufflevector <4 x i32> %x, <4 x i32> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
Expand Down Expand Up @@ -377,8 +375,7 @@ define <8 x i8> @inner_shuffle(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) {
define <4 x i32> @extrause_add_same_operands(<4 x i32> %x) {
; CHECK-LABEL: @extrause_add_same_operands(
; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
; CHECK-NEXT: [[ADD:%.*]] = add <4 x i32> [[SHUF]], [[SHUF]]
; CHECK-NEXT: [[REVSHUF:%.*]] = shufflevector <4 x i32> [[ADD]], <4 x i32> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
; CHECK-NEXT: [[REVSHUF:%.*]] = add <4 x i32> [[X]], [[X]]
; CHECK-NEXT: [[ADD2:%.*]] = add <4 x i32> [[SHUF]], [[REVSHUF]]
; CHECK-NEXT: ret <4 x i32> [[ADD2]]
;
Expand Down Expand Up @@ -526,9 +523,7 @@ define <8 x half> @fma(<8 x half> %a, <8 x half> %b, <8 x half> %c) {

define <4 x i64> @single_zext(<4 x i32> %x) {
; CHECK-LABEL: @single_zext(
; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
; CHECK-NEXT: [[ZEXT:%.*]] = zext <4 x i32> [[SHUF]] to <4 x i64>
; CHECK-NEXT: [[REVSHUF:%.*]] = shufflevector <4 x i64> [[ZEXT]], <4 x i64> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
; CHECK-NEXT: [[REVSHUF:%.*]] = zext <4 x i32> [[X:%.*]] to <4 x i64>
; CHECK-NEXT: ret <4 x i64> [[REVSHUF]]
;
%shuf = shufflevector <4 x i32> %x, <4 x i32> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
Expand Down Expand Up @@ -708,10 +703,8 @@ define void @trunc(<8 x i64> %a, <8 x i64> %b, ptr %p) {

define <4 x i64> @zext_chain(<4 x i16> %x) {
; CHECK-LABEL: @zext_chain(
; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <4 x i16> [[X:%.*]], <4 x i16> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
; CHECK-NEXT: [[ZEXT:%.*]] = zext <4 x i16> [[SHUF]] to <4 x i32>
; CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i32> [[ZEXT]] to <4 x i64>
; CHECK-NEXT: [[REVSHUF:%.*]] = shufflevector <4 x i64> [[SEXT]], <4 x i64> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
; CHECK-NEXT: [[TMP1:%.*]] = zext <4 x i16> [[X:%.*]] to <4 x i32>
; CHECK-NEXT: [[REVSHUF:%.*]] = sext <4 x i32> [[TMP1]] to <4 x i64>
; CHECK-NEXT: ret <4 x i64> [[REVSHUF]]
;
%shuf = shufflevector <4 x i16> %x, <4 x i16> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
Expand Down Expand Up @@ -912,13 +905,11 @@ entry:

define <4 x i8> @singleop(<4 x i8> %a, <4 x i8> %b) {
; CHECK-LABEL: @singleop(
; CHECK-NEXT: [[A1:%.*]] = shufflevector <4 x i8> [[A:%.*]], <4 x i8> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
; CHECK-NEXT: [[B1:%.*]] = shufflevector <4 x i8> [[B:%.*]], <4 x i8> poison, <4 x i32> zeroinitializer
; CHECK-NEXT: [[A2:%.*]] = zext <4 x i8> [[A1]] to <4 x i16>
; CHECK-NEXT: [[B2:%.*]] = zext <4 x i8> [[B1]] to <4 x i16>
; CHECK-NEXT: [[AB:%.*]] = add <4 x i16> [[A2]], [[B2]]
; CHECK-NEXT: [[T:%.*]] = trunc <4 x i16> [[AB]] to <4 x i8>
; CHECK-NEXT: [[R:%.*]] = shufflevector <4 x i8> [[T]], <4 x i8> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i8> [[B:%.*]], <4 x i8> poison, <4 x i32> zeroinitializer
; CHECK-NEXT: [[TMP2:%.*]] = zext <4 x i8> [[A:%.*]] to <4 x i16>
; CHECK-NEXT: [[TMP3:%.*]] = zext <4 x i8> [[TMP1]] to <4 x i16>
; CHECK-NEXT: [[TMP4:%.*]] = add <4 x i16> [[TMP2]], [[TMP3]]
; CHECK-NEXT: [[R:%.*]] = trunc <4 x i16> [[TMP4]] to <4 x i8>
; CHECK-NEXT: ret <4 x i8> [[R]]
;
%a1 = shufflevector <4 x i8> %a, <4 x i8> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
Expand Down
5 changes: 0 additions & 5 deletions revert_patches.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -62,11 +62,6 @@ Revert: breaks ipBlender*

contact: Pierre

---
Revert: breaks hipCatch2
[VectorCombine] Remove requirement for Instructions in shuffleToIdentity (#93543)

contact : RonL
---
Revert: temaplate breaks ComposableKernel build
f46d1463b835 [clang] require template arg list after template kw (#80801)
Expand Down

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