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Add API for non-caching-load
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ranapratap55 committed Oct 15, 2024
1 parent 62d10fd commit 24372dc
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1 change: 1 addition & 0 deletions CMakeLists.txt
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Expand Up @@ -388,6 +388,7 @@ set(SRC_FILES
src/device/broadcast.h
src/device/common.h
src/device/common_kernel.h
src/device/non_caching_load.h
src/device/op128.h
src/device/primitives.h
src/device/prims_ll128.h
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77 changes: 77 additions & 0 deletions src/device/non_caching_load.h
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#ifndef NON_CACHING_LOAD_H_
#define NON_CACHING_LOAD_H_

template<typename T>
inline
__attribute__((always_inline))
__host__ __device__ T __non_caching_load(const T* p)
{
#if !defined(__GFX11__) && !defined(GFX12)
#define LD "global_load_ubyte"
#define LD2 "global_load_ushort"
#define LD3 "global_load_dword"
#define LD4 "global_load_dwordx2"
#define LD5 "global_load_dwordx4"
#if defined(__gfx940__) || defined(__gfx941__) || defined(__gfx942__)
#define BITS "sc0 sc1 nt"
#elif defined(__GFX9__) || defined(__gfx1010__) || defined(__gfx1011__) || defined(__gfx1012__) || defined(__gfx1013__)
#define BITS "glc slc"
#else
#define BITS "glc slc dlc"
#endif
#define WAIT ((0 << 14) | (0x3f << 8) | (0x7) << 4)
#else
#define LD "global_load_u8"
#define LD2 "global_load_u16"
#define LD3 "global_load_b32"
#define LD4 "global_load_b64"
#define LD5 "global_load_b128"
#define BITS "glc slc dlc"
#define WAIT ((0 << 10) | (0x3f << 4) | 0x7)
#endif
#define LOAD LD " %0 %1 off " BITS
#define LOAD2 LD2 " %0 %1 off " BITS
#define LOAD3 LD3 " %0 %1 off " BITS
#define LOAD4 LD4 " %0 %1 off " BITS
#define LOAD5 LD5 " %0 %1 off " BITS

T r{};

switch (sizeof(T)) {
case 1:
asm volatile(LOAD : "={v0}"(r) : "v"(p));
break;
case 2:
asm volatile(LOAD2 : "={v0}"(r) : "v"(p));
break;
case 4:
asm volatile(LOAD3 : "={v0}"(r) : "v"(p));
break;
case 8:
asm volatile(LOAD4 : "={v[0:1]}"(r) : "v"(p));
break;
case 16:
asm volatile(LOAD5 : "=v"(r) : "v"(p));
break;
default: __builtin_trap();
}
__builtin_amdgcn_s_waitcnt(WAIT);

return r;

#undef LOAD5
#undef LOAD4
#undef LOAD3
#undef LOAD2
#undef LOAD
#undef WAIT
#undef BITS
#undef LD5
#undef LD4
#undef LD3
#undef LD2
#undef LD
}

#endif

21 changes: 21 additions & 0 deletions tools/non-caching-load/Makefile
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# Copyright (c) 2020 Advanced Micro Devices, Inc. All rights reserved.

# Set to where RCCL is installed
RCCL_INSTALL=../../build/release

HIP_PATH?= $(wildcard /opt/rocm)
ifeq (,$(HIP_PATH))
HIP_PATH=../../..
endif
HIPCC=$(HIP_PATH)/bin/hipcc

EXE=non-caching-load
CXXFLAGS = -std=c++11 -O3 -I../../src/include -I../../src/device -I$(RCCL_INSTALL) -L$(RCCL_INSTALL) -lrccl

all: $(EXE)

$(EXE): $(EXE).cpp $(shell find -regex ".*\.\hpp")
$(HIPCC) $(CXXFLAGS) $< -o $@

clean:
rm -f *.o $(EXE)
114 changes: 114 additions & 0 deletions tools/non-caching-load/non-caching-load.cpp
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/*
Copyright (c) 2020 Advanced Micro Devices, Inc. All rights reserved.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
THE SOFTWARE.
*/

#include <sys/socket.h>
#include <ifaddrs.h>
#include <netdb.h>
#include <unistd.h>
#include <cstdio>
#include <string>
#include <chrono>
#include <hip/hip_runtime.h>
#include <rccl/rccl.h>
#include <cstdlib>
#include <fstream>
#include <iostream> //cerr
#include <cstring>
#include "non-caching-load.hpp"
#include "non_caching_load.h"

typedef uint32_t uint32x4 __attribute__((ext_vector_type(4)));

template<typename T>
__global__ void nonCachingLoad(T* p, T* out){
if constexpr (std::is_same<T, uint32x4>::value)
p[0] = {22, 22, 22, 22};
else
p[0] = 22;
out[0] = __non_caching_load<T>(p);
}

template<typename T>
__global__ void builtinTemporalLoad(T* p, T* out){
if constexpr (std::is_same<T, uint32x4>::value)
p[0] = {22, 22, 22, 22};
else
p[0] = 22;
out[0] = __builtin_nontemporal_load(p);
}

template<typename T>
void caching_load() {
T* data;
T* out1;
T* out2;
size_t size = sizeof(data);

hipMalloc(&data, size);
hipMalloc(&out1, size);
hipMalloc(&out2, size);

hipLaunchKernelGGL(nonCachingLoad<T>, dim3(1), dim3(1), 0, 0, data, out1);
hipLaunchKernelGGL(builtinTemporalLoad<T>, dim3(1), dim3(1), 0, 0, data, out2);

hipDeviceSynchronize();

T* host_data = (T*)malloc(size);
T* h_o1 = (T*)malloc(size);
T* h_o2 = (T*)malloc(size);

hipMemcpy(host_data, data, size, hipMemcpyDeviceToHost);
hipMemcpy(h_o1, out1, size, hipMemcpyDeviceToHost);
hipMemcpy(h_o2, out2, size, hipMemcpyDeviceToHost);

if constexpr (std::is_same<T, uint32x4>::value)
{
if ( ((*h_o1)[0] == (*h_o2)[0]) && ((*h_o1)[1] == (*h_o2)[1]) && ((*h_o1)[2] == (*h_o2)[2]) && ((*h_o1)[3] == (*h_o2)[3]))
std::cout << "PASS" << std::endl;
else
std::cout << "FAIL" << std::endl;
}
else {
if(*h_o1 == *h_o2)
{
std::cout << "PASS" << std::endl;
}
else{
std::cout << "FAIL" << std::endl;
}
}

hipFree(data);
return;
}

int main(int argc, char **argv)
{
caching_load<uint64_t>();
caching_load<uint32_t>();
caching_load<uint16_t>();
caching_load<uint8_t>();
using V2 = unsigned __attribute__((ext_vector_type(4)));
caching_load<V2>();

return 0;
}
49 changes: 49 additions & 0 deletions tools/non-caching-load/non-caching-load.hpp
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/*
Copyright (c) 2020 Advanced Micro Devices, Inc. All rights reserved.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
THE SOFTWARE.
*/

#ifndef HELLORCCL_HPP
#define HELLORCCL_HPP
#include <iostream>

#define HIP_CALL(cmd) \
do { \
hipError_t error = (cmd); \
if (error != hipSuccess) \
{ \
std::cerr << "Encountered HIP error (" << hipGetErrorString(error) << ") at line " \
<< __LINE__ << " in file " << __FILE__ << "\n"; \
exit(-1); \
} \
} while (0)

#define NCCL_CALL(cmd) \
do { \
ncclResult_t error = (cmd); \
if (error != ncclSuccess) \
{ \
std::cerr << "Encountered NCCL error (" << ncclGetErrorString(error) << ") at line " \
<< __LINE__ << " in file " << __FILE__ << "\n"; \
exit(-1); \
} \
} while (0)

#endif
22 changes: 22 additions & 0 deletions tools/non-caching-load/runTest.sh
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#!/bin/bash
RCCL_INSTALL=../../build/release
EXE=$PWD/non-caching-load
LDPATH=$LD_LIBRARY_PATH:$RCCL_INSTALL

echo "Single process - With clique-based kernels:"
RCCL_CLIQUE_ALLREDUCE_BYTE_LIMIT=1073741824 RCCL_FORCE_ENABLE_CLIQUE=1 NCCL_DEBUG=INFO RCCL_ENABLE_CLIQUE=1 LD_LIBRARY_PATH=$LDPATH $EXE 4

echo "Single process - Without clique-based kernels:"
NCCL_DEBUG=INFO LD_LIBRARY_PATH=$LDPATH $EXE 4

echo "With clique-based kernels:"
RCCL_CLIQUE_ALLREDUCE_BYTE_LIMIT=1073741824 RCCL_FORCE_ENABLE_CLIQUE=1 NCCL_DEBUG=INFO RCCL_ENABLE_CLIQUE=1 NCCL_COMM_ID=$HOSTNAME:12345 LD_LIBRARY_PATH=$LDPATH $EXE 4 0 &
RCCL_CLIQUE_ALLREDUCE_BYTE_LIMIT=1073741824 RCCL_FORCE_ENABLE_CLIQUE=1 NCCL_DEBUG=INFO RCCL_ENABLE_CLIQUE=1 NCCL_COMM_ID=$HOSTNAME:12345 LD_LIBRARY_PATH=$LDPATH $EXE 4 1 &
RCCL_CLIQUE_ALLREDUCE_BYTE_LIMIT=1073741824 RCCL_FORCE_ENABLE_CLIQUE=1 NCCL_DEBUG=INFO RCCL_ENABLE_CLIQUE=1 NCCL_COMM_ID=$HOSTNAME:12345 LD_LIBRARY_PATH=$LDPATH $EXE 4 2 &
RCCL_CLIQUE_ALLREDUCE_BYTE_LIMIT=1073741824 RCCL_FORCE_ENABLE_CLIQUE=1 NCCL_DEBUG=INFO RCCL_ENABLE_CLIQUE=1 NCCL_COMM_ID=$HOSTNAME:12345 LD_LIBRARY_PATH=$LDPATH $EXE 4 3

echo "Without clique-based kernels:"
NCCL_COMM_ID=$HOSTNAME:12345 LD_LIBRARY_PATH=$LDPATH $EXE 4 0 &
NCCL_COMM_ID=$HOSTNAME:12345 LD_LIBRARY_PATH=$LDPATH $EXE 4 1 &
NCCL_COMM_ID=$HOSTNAME:12345 LD_LIBRARY_PATH=$LDPATH $EXE 4 2 &
NCCL_COMM_ID=$HOSTNAME:12345 LD_LIBRARY_PATH=$LDPATH $EXE 4 3

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