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refactor based on daniel's comments
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umangyadav committed Oct 1, 2024
1 parent b521f41 commit efd63a4
Showing 1 changed file with 6 additions and 13 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -219,7 +219,6 @@ struct LowerGpuOpsToROCDLOpsPass
gpu::GPUModuleOp m = getOperation();
MLIRContext *ctx = m.getContext();
ArrayAttr targets = m.getTargetsAttr();
FailureOr<amdgpu::Chipset> maybeChipset;
if (chipset == "infer") {
if (!targets) {
emitError(UnknownLoc::get(ctx),
Expand All @@ -233,18 +232,12 @@ struct LowerGpuOpsToROCDLOpsPass
}
const ROCDL::ROCDLTargetAttr targetAttr =
mlir::dyn_cast<ROCDL::ROCDLTargetAttr>(targets.getValue().front());
maybeChipset = amdgpu::Chipset::parse(targetAttr.getChip());
if (failed(maybeChipset)) {
emitError(UnknownLoc::get(ctx),
"Invalid chipset name: " + targetAttr.getChip());
return signalPassFailure();
}
} else {
maybeChipset = amdgpu::Chipset::parse(chipset);
if (failed(maybeChipset)) {
emitError(UnknownLoc::get(ctx), "Invalid chipset name: " + chipset);
return signalPassFailure();
}
chipset = targetAttr.getChip().str();
}
FailureOr<amdgpu::Chipset> maybeChipset = amdgpu::Chipset::parse(chipset);
if (failed(maybeChipset)) {
emitError(UnknownLoc::get(ctx), "Invalid chipset name: " + chipset);
return signalPassFailure();
}

auto llvmDataLayout = m->getAttrOfType<StringAttr>(
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