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Merge branch 'development' into Interrupts
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Signed-off-by: RedsonBr140 <redson@riseup.net>
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RedsonBr140 authored Nov 6, 2023
2 parents 85b0d3b + 7a8234b commit 584f85d
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Showing 4 changed files with 167 additions and 2 deletions.
4 changes: 2 additions & 2 deletions .gitignore
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Expand Up @@ -80,6 +80,6 @@ dkms.conf
*.iso

## Bochs
bx_enh_dbg.ini

compile_commands.json
bx_enh_dbg.ini
compile_commands.json
12 changes: 12 additions & 0 deletions Kernel/Arch/x86_64-pc/Include/System/ISR.h
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#pragma once
#include <stdint.h>

typedef struct {
uint64_t r15, r14, r13, r12, r11, r10, r9, r8;
uint64_t rdi, rsi, rbx, rdx, rcx, rax;
uint64_t interrupt, error;
} __attribute__((packed)) Registers;

typedef void (*ISRHandler)(Registers *regs);

void isr_register_handler(int interrupt, ISRHandler handler);
98 changes: 98 additions & 0 deletions Kernel/Arch/x86_64-pc/System/ISR.asm
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[bits 64]
[extern isr_handler]

%macro isr_err_stub 1
isr_stub_%+%1:
push %1
jmp isr_common
%endmacro

%macro isr_no_err_stub 1
isr_stub_%+%1:
push 0
push %1
jmp isr_common
%endmacro

%macro pushagrd 0
push rax
push rbx
push rcx
push rdx
push rsi
push rdi
push r8
push r9
push r10
push r11
push r12
push r13
push r14
push r15
%endmacro

%macro popagrd 0
pop r15
pop r14
pop r13
pop r12
pop r11
pop r10
pop r9
pop r8
pop rdi
pop rsi
pop rdx
pop rcx
pop rbx
pop rax
%endmacro

isr_common:
pushagrd
mov rdi, rsp
call isr_handler
popagrd
add rsp, 16
iretq

isr_no_err_stub 0
isr_no_err_stub 1
isr_no_err_stub 2
isr_no_err_stub 3
isr_no_err_stub 4
isr_no_err_stub 5
isr_no_err_stub 6
isr_no_err_stub 7
isr_err_stub 8
isr_no_err_stub 9
isr_err_stub 10
isr_err_stub 11
isr_err_stub 12
isr_err_stub 13
isr_err_stub 14
isr_no_err_stub 15
isr_no_err_stub 16
isr_err_stub 17
isr_no_err_stub 18
isr_no_err_stub 19
isr_no_err_stub 20
isr_no_err_stub 21
isr_no_err_stub 22
isr_no_err_stub 23
isr_no_err_stub 24
isr_no_err_stub 25
isr_no_err_stub 26
isr_no_err_stub 27
isr_no_err_stub 28
isr_no_err_stub 29
isr_err_stub 30
isr_no_err_stub 31

global isr_stub_table
isr_stub_table:
%assign i 0
%rep 32
dq isr_stub_%+i
%assign i i+1
%endrep
55 changes: 55 additions & 0 deletions Kernel/Arch/x86_64-pc/System/ISR.c
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#include <LibK/stdio.h>
#include <System/ISR.h>
#include <stddef.h>

ISRHandler ISR_handlers[256];

static const char *const exceptions_str[] = {"Division by Zero",
"Debug",
"Non-maskable Interrupt",
"Breakpoint",
"Overflow",
"Bound Range Exceeded",
"Invalid Opcode",
"Device Not Available",
"Double Fault",
"Coprocessor Segment Overrun",
"Invalid TSS",
"Segment Not Present",
"Stack-Segment Fault",
"General Protection Fault",
"Page Fault",
"",
"x87 Floating-Point Exception",
"Alignment Check",
"Machine Check",
"SIMD Floating-Point Exception",
"Virtualization Exception",
"Control Protection Exception ",
"",
"",
"",
"",
"",
"",
"Hypervisor Injection Exception",
"VMM Communication Exception",
"Security Exception",
""};

void isr_handler(Registers *frame);
void isr_handler(Registers *frame) {
uint64_t isr = frame->interrupt;

if (ISR_handlers[isr] != NULL)
ISR_handlers[isr](frame);
else if (isr < 32) {
kprintf("Unhandled exception %d %s", isr, exceptions_str[isr]);
} else {
kprintf("Unhandled interrupt: %d", isr);
}
}

void isr_register_handler(int interrupt, ISRHandler handler) {
ISR_handlers[interrupt] = handler;
}

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