Lack of enable the disp signal panel and start clocking data to the LCD

[grados73]

Hello Rudolph,
Thank you very much for the work you put into creating this lib.
I think I found a small error while trying to enable the display using your lib.
I am using RVT50HQBNWC00-B with STM32, so I set #define EVE_RVT50H in EVE_config.h.
It turns on config:

/* RVT50HQBxxxxx 800x480 5.0" Riverdi, various options, BT817 */
#if defined(EVE_RVT50H)
#define EVE_HSIZE (800L)
#define EVE_VSIZE (480L)

#define EVE_VSYNC0 (0L)
#define EVE_VSYNC1 (4L)
#define EVE_VOFFSET (8L)
#define EVE_VCYCLE (496L)
#define EVE_HSYNC0 (0L)
#define EVE_HSYNC1 (4L)
#define EVE_HOFFSET (8L)
#define EVE_HCYCLE (816L)
#define EVE_PCLK (3L)    // <= important!
#define EVE_PCLKPOL (1L)
#define EVE_SWIZZLE (0L)
#define EVE_CSPREAD (0L)
#define EVE_HAS_CRYSTAL
#define EVE_GEN 4

#endif

When REG_PCLK is set to 2 to 255, the display out is in pass-through mode, but this setup makes that in function static uint8_t enable_pixel_clock(void) enable the DISP signal to the LCD panel and start clocking data to the LCD panel are not called.

static uint8_t enable_pixel_clock(void)
{
    uint8_t ret = E_OK;

#if EVE_GEN > 3
#if defined(EVE_PCLK_FREQ)
    uint32_t frequency;
    /* setup the second PLL for the pixel-clock according to the define in EVE_config.h for the display, as close a match as possible */
    frequency = EVE_cmd_pclkfreq(EVE_PCLK_FREQ, 0L);
    if (0U == frequency)    /* this failed for some reason so we return with an error */
    {
        ret = EVE_FAIL_PCLK_FREQ;
    }
    else
    {
        EVE_memWrite8(REG_GPIO, 0x80U); /* enable the DISP signal to the LCD panel, it is set to output in REG_GPIO_DIR by default */
        EVE_memWrite8(REG_PCLK, EVE_PCLK); /* now start clocking data to the LCD panel */
    }
#endif
#else
    EVE_memWrite8(REG_GPIO, 0x80U); /* enable the DISP signal to the LCD panel, it is set to output in REG_GPIO_DIR by default */
    EVE_memWrite8(REG_PCLK, EVE_PCLK); /* now start clocking data to the LCD panel */
#endif

    return ret;
}

Because EVE_GEN = 4, so > 3, but EVE_PCLK_FREQ is not defined. That's why it didn't work for me. In my opinion, this function should look like this, and in this form at my place it works:

static uint8_t enable_pixel_clock(void)
{
    uint8_t ret = E_OK;

#if EVE_GEN > 3
	#if defined(EVE_PCLK_FREQ)
		uint32_t frequency;
		/* setup the second PLL for the pixel-clock according to the define in EVE_config.h for the display, as close a match as possible */
		frequency = EVE_cmd_pclkfreq(EVE_PCLK_FREQ, 0L);
		if (0U == frequency)    /* this failed for some reason so we return with an error */
		{
			ret = EVE_FAIL_PCLK_FREQ;
		}
		else
		{
			EVE_memWrite8(REG_GPIO, 0x80U); /* enable the DISP signal to the LCD panel, it is set to output in REG_GPIO_DIR by default */
			EVE_memWrite8(REG_PCLK, EVE_PCLK); /* now start clocking data to the LCD panel */
		}
	#else
		EVE_memWrite8(REG_GPIO, 0x80U); /* NEW */
		EVE_memWrite8(REG_PCLK, EVE_PCLK); /* NEW */
	#endif
#else
    EVE_memWrite8(REG_GPIO, 0x80U); /* enable the DISP signal to the LCD panel, it is set to output in REG_GPIO_DIR by default */
    EVE_memWrite8(REG_PCLK, EVE_PCLK); /* now start clocking data to the LCD panel */
#endif

    return ret;
}

Best regards,
grados73

[RudolphRiedel]

Thank you for the report!
I just fixed it, at least I have the RVT50HQBNWC00-B up and running here.
And now I also better test it with some more displays...