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Revert the link to the Low Power PPTC cache setting
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The emulator now always uses GiantBlock.
TinyBlock has been left in, but is unused.
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LotP1 committed Nov 20, 2024
1 parent 8fe4e5a commit 95935b7
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Showing 16 changed files with 32 additions and 31 deletions.
3 changes: 3 additions & 0 deletions src/ARMeilleure/Common/AddressTablePresets.cs
Original file line number Diff line number Diff line change
Expand Up @@ -50,6 +50,9 @@ public static class AddressTablePresets
new( 1, 30),
};

//high power will run worse on DDR3 systems and some DDR4 systems due to the higher ram utilization
//low power will never run worse than non-sparse, but for most systems it won't be necessary
//high power is always used, but I've left low power in here for future reference
public static AddressTableLevel[] GetArmPreset(bool for64Bits, bool sparse, bool lowPower = false)
{
if (sparse)
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8 changes: 4 additions & 4 deletions src/Ryujinx.Cpu/AddressTable.cs
Original file line number Diff line number Diff line change
Expand Up @@ -137,7 +137,7 @@ public IntPtr Base
/// <param name="sparse">True if the bottom page should be sparsely mapped</param>
/// <exception cref="ArgumentNullException"><paramref name="levels"/> is null</exception>
/// <exception cref="ArgumentException">Length of <paramref name="levels"/> is less than 2</exception>
public AddressTable(AddressTableLevel[] levels, bool sparse, bool lowPower)
public AddressTable(AddressTableLevel[] levels, bool sparse)
{
ArgumentNullException.ThrowIfNull(levels);

Expand All @@ -157,7 +157,7 @@ public AddressTable(AddressTableLevel[] levels, bool sparse, bool lowPower)
{
// If the address table is sparse, allocate a fill block

_sparseFill = new MemoryBlock(lowPower ? 65536ul : 268435456ul, MemoryAllocationFlags.Mirrorable);
_sparseFill = new MemoryBlock(268435456ul, MemoryAllocationFlags.Mirrorable); //low Power TC uses size: 65536ul

ulong bottomLevelSize = (1ul << levels.Last().Length) * (ulong)sizeof(TEntry);

Expand All @@ -178,12 +178,12 @@ public AddressTable(AddressTableLevel[] levels, bool sparse, bool lowPower)
/// <param name="for64Bits">True if the guest is A64, false otherwise</param>
/// <param name="type">Memory manager type</param>
/// <returns>An <see cref="AddressTable{TEntry}"/> for ARM function lookup</returns>
public static AddressTable<TEntry> CreateForArm(bool for64Bits, MemoryManagerType type, bool lowPower)
public static AddressTable<TEntry> CreateForArm(bool for64Bits, MemoryManagerType type)
{
// Assume software memory means that we don't want to use any signal handlers.
bool sparse = type != MemoryManagerType.SoftwareMmu && type != MemoryManagerType.SoftwarePageTable;

return new AddressTable<TEntry>(AddressTablePresets.GetArmPreset(for64Bits, sparse, lowPower), sparse, lowPower);
return new AddressTable<TEntry>(AddressTablePresets.GetArmPreset(for64Bits, sparse), sparse);
}

/// <summary>
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2 changes: 1 addition & 1 deletion src/Ryujinx.Cpu/AppleHv/HvCpuContext.cs
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@ class HvCpuContext : ICpuContext
private readonly ITickSource _tickSource;
private readonly HvMemoryManager _memoryManager;

public HvCpuContext(ITickSource tickSource, IMemoryManager memory, bool for64Bit, bool lowPower)
public HvCpuContext(ITickSource tickSource, IMemoryManager memory, bool for64Bit)
{
_tickSource = tickSource;
_memoryManager = (HvMemoryManager)memory;
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4 changes: 2 additions & 2 deletions src/Ryujinx.Cpu/AppleHv/HvEngine.cs
Original file line number Diff line number Diff line change
Expand Up @@ -14,9 +14,9 @@ public HvEngine(ITickSource tickSource)
}

/// <inheritdoc/>
public ICpuContext CreateCpuContext(IMemoryManager memoryManager, bool for64Bit, bool lowPower)
public ICpuContext CreateCpuContext(IMemoryManager memoryManager, bool for64Bit)
{
return new HvCpuContext(_tickSource, memoryManager, for64Bit, lowPower);
return new HvCpuContext(_tickSource, memoryManager, for64Bit);
}
}
}
2 changes: 1 addition & 1 deletion src/Ryujinx.Cpu/ICpuEngine.cs
Original file line number Diff line number Diff line change
Expand Up @@ -13,6 +13,6 @@ public interface ICpuEngine
/// <param name="memoryManager">Memory manager for the address space of the context</param>
/// <param name="for64Bit">Indicates if the context will be used to run 64-bit or 32-bit Arm code</param>
/// <returns>CPU context</returns>
ICpuContext CreateCpuContext(IMemoryManager memoryManager, bool for64Bit, bool lowPower);
ICpuContext CreateCpuContext(IMemoryManager memoryManager, bool for64Bit);
}
}
4 changes: 2 additions & 2 deletions src/Ryujinx.Cpu/Jit/JitCpuContext.cs
Original file line number Diff line number Diff line change
Expand Up @@ -12,10 +12,10 @@ class JitCpuContext : ICpuContext
private readonly Translator _translator;
private readonly AddressTable<ulong> _functionTable;

public JitCpuContext(ITickSource tickSource, IMemoryManager memory, bool for64Bit, bool lowPower)
public JitCpuContext(ITickSource tickSource, IMemoryManager memory, bool for64Bit)
{
_tickSource = tickSource;
_functionTable = AddressTable<ulong>.CreateForArm(for64Bit, memory.Type, lowPower);
_functionTable = AddressTable<ulong>.CreateForArm(for64Bit, memory.Type);
_translator = new Translator(new JitMemoryAllocator(forJit: true), memory, _functionTable);

if (memory.Type.IsHostMappedOrTracked())
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4 changes: 2 additions & 2 deletions src/Ryujinx.Cpu/Jit/JitEngine.cs
Original file line number Diff line number Diff line change
Expand Up @@ -12,9 +12,9 @@ public JitEngine(ITickSource tickSource)
}

/// <inheritdoc/>
public ICpuContext CreateCpuContext(IMemoryManager memoryManager, bool for64Bit, bool lowPower)
public ICpuContext CreateCpuContext(IMemoryManager memoryManager, bool for64Bit)
{
return new JitCpuContext(_tickSource, memoryManager, for64Bit, lowPower);
return new JitCpuContext(_tickSource, memoryManager, for64Bit);
}
}
}
4 changes: 2 additions & 2 deletions src/Ryujinx.Cpu/LightningJit/LightningJitCpuContext.cs
Original file line number Diff line number Diff line change
Expand Up @@ -11,11 +11,11 @@ class LightningJitCpuContext : ICpuContext
private readonly Translator _translator;
private readonly AddressTable<ulong> _functionTable;

public LightningJitCpuContext(ITickSource tickSource, IMemoryManager memory, bool for64Bit, bool lowPower)
public LightningJitCpuContext(ITickSource tickSource, IMemoryManager memory, bool for64Bit)
{
_tickSource = tickSource;

_functionTable = AddressTable<ulong>.CreateForArm(for64Bit, memory.Type, lowPower);
_functionTable = AddressTable<ulong>.CreateForArm(for64Bit, memory.Type);

_translator = new Translator(memory, _functionTable);

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4 changes: 2 additions & 2 deletions src/Ryujinx.Cpu/LightningJit/LightningJitEngine.cs
Original file line number Diff line number Diff line change
Expand Up @@ -12,9 +12,9 @@ public LightningJitEngine(ITickSource tickSource)
}

/// <inheritdoc/>
public ICpuContext CreateCpuContext(IMemoryManager memoryManager, bool for64Bit, bool lowPower)
public ICpuContext CreateCpuContext(IMemoryManager memoryManager, bool for64Bit)
{
return new LightningJitCpuContext(_tickSource, memoryManager, for64Bit, lowPower);
return new LightningJitCpuContext(_tickSource, memoryManager, for64Bit);
}
}
}
5 changes: 2 additions & 3 deletions src/Ryujinx.HLE/HOS/ArmProcessContext.cs
Original file line number Diff line number Diff line change
Expand Up @@ -34,8 +34,7 @@ public ArmProcessContext(
GpuContext gpuContext,
T memoryManager,
ulong addressSpaceSize,
bool for64Bit,
bool lowPower)
bool for64Bit)
{
if (memoryManager is IRefCounted rc)
{
Expand All @@ -46,7 +45,7 @@ public ArmProcessContext(

_pid = pid;
_gpuContext = gpuContext;
_cpuContext = cpuEngine.CreateCpuContext(memoryManager, for64Bit, lowPower);
_cpuContext = cpuEngine.CreateCpuContext(memoryManager, for64Bit);
_memoryManager = memoryManager;

AddressSpaceSize = addressSpaceSize;
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11 changes: 5 additions & 6 deletions src/Ryujinx.HLE/HOS/ArmProcessContextFactory.cs
Original file line number Diff line number Diff line change
Expand Up @@ -48,13 +48,12 @@ public IProcessContext Create(KernelContext context, ulong pid, ulong addressSpa
IArmProcessContext processContext;

bool isArm64Host = RuntimeInformation.ProcessArchitecture == Architecture.Arm64;
bool isLowPower = context.Device.Configuration.LowPowerPtc;

if (OperatingSystem.IsMacOS() && isArm64Host && for64Bit && context.Device.Configuration.UseHypervisor)
{
var cpuEngine = new HvEngine(_tickSource);
var memoryManager = new HvMemoryManager(context.Memory, addressSpaceSize, invalidAccessHandler);
processContext = new ArmProcessContext<HvMemoryManager>(pid, cpuEngine, _gpu, memoryManager, addressSpaceSize, for64Bit, isLowPower);
processContext = new ArmProcessContext<HvMemoryManager>(pid, cpuEngine, _gpu, memoryManager, addressSpaceSize, for64Bit);
}
else
{
Expand Down Expand Up @@ -88,15 +87,15 @@ public IProcessContext Create(KernelContext context, ulong pid, ulong addressSpa
{
case MemoryManagerMode.SoftwarePageTable:
var memoryManager = new MemoryManager(context.Memory, addressSpaceSize, invalidAccessHandler);
processContext = new ArmProcessContext<MemoryManager>(pid, cpuEngine, _gpu, memoryManager, addressSpaceSize, for64Bit, isLowPower);
processContext = new ArmProcessContext<MemoryManager>(pid, cpuEngine, _gpu, memoryManager, addressSpaceSize, for64Bit);
break;

case MemoryManagerMode.HostMapped:
case MemoryManagerMode.HostMappedUnsafe:
if (addressSpace == null)
{
var memoryManagerHostTracked = new MemoryManagerHostTracked(context.Memory, addressSpaceSize, mode == MemoryManagerMode.HostMappedUnsafe, invalidAccessHandler);
processContext = new ArmProcessContext<MemoryManagerHostTracked>(pid, cpuEngine, _gpu, memoryManagerHostTracked, addressSpaceSize, for64Bit, isLowPower);
processContext = new ArmProcessContext<MemoryManagerHostTracked>(pid, cpuEngine, _gpu, memoryManagerHostTracked, addressSpaceSize, for64Bit);
}
else
{
Expand All @@ -106,7 +105,7 @@ public IProcessContext Create(KernelContext context, ulong pid, ulong addressSpa
}

var memoryManagerHostMapped = new MemoryManagerHostMapped(addressSpace, mode == MemoryManagerMode.HostMappedUnsafe, invalidAccessHandler);
processContext = new ArmProcessContext<MemoryManagerHostMapped>(pid, cpuEngine, _gpu, memoryManagerHostMapped, addressSpace.AddressSpaceSize, for64Bit, isLowPower);
processContext = new ArmProcessContext<MemoryManagerHostMapped>(pid, cpuEngine, _gpu, memoryManagerHostMapped, addressSpace.AddressSpaceSize, for64Bit);
}
break;

Expand All @@ -115,7 +114,7 @@ public IProcessContext Create(KernelContext context, ulong pid, ulong addressSpa
}
}

DiskCacheLoadState = processContext.Initialize(_titleIdText, _displayVersion, _diskCacheEnabled, _codeAddress, _codeSize, isLowPower ? "LowPower" : "HighPower");
DiskCacheLoadState = processContext.Initialize(_titleIdText, _displayVersion, _diskCacheEnabled, _codeAddress, _codeSize, "HighPower"); //Ready for exefs profiles

return processContext;
}
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4 changes: 2 additions & 2 deletions src/Ryujinx.Tests/Cpu/CpuContext.cs
Original file line number Diff line number Diff line change
Expand Up @@ -11,9 +11,9 @@ public class CpuContext
{
private readonly Translator _translator;

public CpuContext(IMemoryManager memory, bool for64Bit, bool lowPower)
public CpuContext(IMemoryManager memory, bool for64Bit)
{
_translator = new Translator(new JitMemoryAllocator(), memory, AddressTable<ulong>.CreateForArm(for64Bit, memory.Type, lowPower));
_translator = new Translator(new JitMemoryAllocator(), memory, AddressTable<ulong>.CreateForArm(for64Bit, memory.Type));
memory.UnmapEvent += UnmapHandler;
}

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2 changes: 1 addition & 1 deletion src/Ryujinx.Tests/Cpu/CpuTest.cs
Original file line number Diff line number Diff line change
Expand Up @@ -62,7 +62,7 @@ public void Setup()

_context = CpuContext.CreateExecutionContext();

_cpuContext = new CpuContext(_memory, for64Bit: true, lowPower: false);
_cpuContext = new CpuContext(_memory, for64Bit: true);

// Prevent registering LCQ functions in the FunctionTable to avoid initializing and populating the table,
// which improves test durations.
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2 changes: 1 addition & 1 deletion src/Ryujinx.Tests/Cpu/CpuTest32.cs
Original file line number Diff line number Diff line change
Expand Up @@ -57,7 +57,7 @@ public void Setup()
_context = CpuContext.CreateExecutionContext();
_context.IsAarch32 = true;

_cpuContext = new CpuContext(_memory, for64Bit: false, lowPower: false);
_cpuContext = new CpuContext(_memory, for64Bit: false);

// Prevent registering LCQ functions in the FunctionTable to avoid initializing and populating the table,
// which improves test durations.
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2 changes: 1 addition & 1 deletion src/Ryujinx.Tests/Cpu/EnvironmentTests.cs
Original file line number Diff line number Diff line change
Expand Up @@ -22,7 +22,7 @@ private static void EnsureTranslator()
_translator ??= new Translator(
new JitMemoryAllocator(),
new MockMemoryManager(),
AddressTable<ulong>.CreateForArm(true, MemoryManagerType.SoftwarePageTable, lowPower: false));
AddressTable<ulong>.CreateForArm(true, MemoryManagerType.SoftwarePageTable));
}

[MethodImpl(MethodImplOptions.NoInlining | MethodImplOptions.NoOptimization)]
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2 changes: 1 addition & 1 deletion src/Ryujinx.Tests/Memory/PartialUnmaps.cs
Original file line number Diff line number Diff line change
Expand Up @@ -58,7 +58,7 @@ private static void EnsureTranslator()
_translator ??= new Translator(
new JitMemoryAllocator(),
new MockMemoryManager(),
AddressTable<ulong>.CreateForArm(true, MemoryManagerType.SoftwarePageTable, lowPower: false));
AddressTable<ulong>.CreateForArm(true, MemoryManagerType.SoftwarePageTable));
}

[Test]
Expand Down

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