Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Accurate PWM frequency for SAMD21 #23

Merged
merged 2 commits into from
Jul 14, 2020
Merged

Conversation

dachristensen
Copy link

I ran into some issues trying to generate a 50 Hz PWM signal to drive an SG90 servo motor from a Seeeduino XIAO using an ATSAMD21. No matter what I tried I always ended up with a 733 Hz (48Mhz / 0xFFFF period counter). When I dug into the code it looked like the prescaler register wasn't being set and the PER register wasn't being leveraged to get an accurate frequency. This code resolves this issue and also addresses a couple of bugs that I encountered in the prescaler calculation. I tried to keep the code sane for the SAMD51, but to be honest I didn't have a dev board to test against. With these changes, I was able to generate and measure (using a USB logic analyzer) accurate PWM frequencies from 1Hz up to 46.8Khz (the max frequency attainable while preserving 10 bit resolution).

Daniel L. Christensen added 2 commits July 11, 2020 17:27
 that the API implies. For SAMD51, which doesn't have any spare
 bits, don't try to adjust the period.
@dachristensen
Copy link
Author

Two more notes about the commit:

  1. I changed toneMaxFrequency to F_CPU because toneMaxFrequency cut the clock in half and did not seem to match the clock that we actually use.
  2. I rearranged the order of the code in the loop that calculates the divider. I seem to have stumbled onto a bug. Consider the following:
    Assuming a frequency of 24Hz, we will drop below PER_COUNTER (0xffff) when i=3 and ccValue = 24,000,000(toneMaxFrequency) / 24(frequency) / 2<<3(i) = 62500. After this calculation the old code increments i to 4, checks that i=4 and then increments again to 5. After this we exit the loop because ccValue is less than PER_COUNTER. We then switch(i-1 = 5-1 = 4) and fall through to the default case. So, with a requested frequency of 24Hz we get a DIV1 instead of a DIV16.

@LynnL4
Copy link
Member

LynnL4 commented Jul 12, 2020

Thanks for you PR, I'll test it and then merge your PR.

@LynnL4 LynnL4 merged commit 8398d1a into Seeed-Studio:master Jul 14, 2020
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

2 participants