Pull request project-chip#1538: Updating wifisdk to v3.1.3-rc3

Merge in WMN_TOOLS/matter from feature/updating_wifisdk_to_3.1.3-rc3 to RC_2.3.0-1.3

Squashed commit of the following:

commit d3b7b60add059a161db540f37dc30a9ecacb3c49
Author: Arun Padakanti <arunkumar.padakanti@silabs.com>
Date:   Thu Feb 8 07:01:40 2024 +0530

    Moved the macro define after includes

commit 81152cf7c68f0e36faea634eb3aa1a1c3b45cc28
Author: Arun Padakanti <arunkumar.padakanti@silabs.com>
Date:   Tue Feb 6 22:11:57 2024 +0530

    Moved static variable declaration under macro

commit 2013075d84aa1bf4018e4eee2303243b62a5cb2b
Author: Arun Padakanti <arunkumar.padakanti@silabs.com>
Date:   Tue Feb 6 21:04:22 2024 +0530

    Added macro for magic number in efx32_ncp_host.c

... and 2 more commits

examples/platform/silabs/efr32/rs911x/hal/efx32_ncp_host.c

@@ -15,35 +15,36 @@
  *
  ******************************************************************************/
 
-#include "FreeRTOS.h"
-#include "cmsis_os2.h"
-#include "dmadrv.h"
+#include "sl_wifi_constants.h"
+#include "sl_si91x_host_interface.h"
+#include "sl_status.h"
+#include "em_usart.h"
 #include "em_cmu.h"
 #include "em_core.h"
 #include "em_gpio.h"
-#include "em_usart.h"
+#include "cmsis_os2.h"
+#include "dmadrv.h"
 #include "gpiointerrupt.h"
 #include "sl_board_configuration_SiWx917.h"
-#include "sl_constants.h"
-#include "sl_rsi_utility.h"
-#include "sl_si91x_host_interface.h"
 #include "sl_si91x_status.h"
-#include "sl_status.h"
-#include "sl_wifi_constants.h"
+#include "sl_rsi_utility.h"
+#include "sl_constants.h"
 #include <stdbool.h>
 #include <string.h>
-
 #if defined(SL_CATLOG_POWER_MANAGER_PRESENT)
 #include "sl_power_manager.h"
 #endif
 
+#define USART_INITSYNC_BAUDRATE 12500000
+
 static bool dma_callback(unsigned int channel, unsigned int sequenceNo, void * userParam);
 
 unsigned int rx_ldma_channel;
 unsigned int tx_ldma_channel;
-osMutexId_t spi_transfer_mutex = 0;
+osMutexId_t ncp_transfer_mutex = 0;
 
 static uint32_t dummy_buffer;
+static sl_si91x_host_init_configuration init_config = { 0 };
 
 // LDMA descriptor and transfer configuration structures for USART TX channel
 LDMA_Descriptor_t ldmaTXDescriptor;
@@ -70,33 +71,22 @@ static bool dma_callback(unsigned int channel, unsigned int sequenceNo, void * u
 static void gpio_interrupt(uint8_t interrupt_number)
 {
     UNUSED_PARAMETER(interrupt_number);
-    sl_si91x_host_set_bus_event(NCP_HOST_BUS_RX_EVENT);
-    //  GPIO_IntClear(0xAAAA);
-}
 
-void sl_si91x_host_set_sleep_indicator(void)
-{
-    GPIO_PinOutSet(SLEEP_CONFIRM_PIN.port, SLEEP_CONFIRM_PIN.pin);
-}
+    if (NULL != init_config.rx_irq) {
+        init_config.rx_irq();
+    }
 
-void sl_si91x_host_clear_sleep_indicator(void)
-{
-    GPIO_PinOutClear(SLEEP_CONFIRM_PIN.port, SLEEP_CONFIRM_PIN.pin);
 }
 
-uint32_t sl_si91x_host_get_wake_indicator(void)
+static void efx32_spi_init(void)
 {
-    return GPIO_PinInGet(WAKE_INDICATOR_PIN.port, WAKE_INDICATOR_PIN.pin);
-}
+    // Default asynchronous initializer (master mode, 1 Mbps, 8-bit data)
+    USART_InitSync_TypeDef init = USART_INITSYNC_DEFAULT;
 
-sl_status_t sl_si91x_host_init(void)
-{
-    // Enable clock (not needed on xG21)
-    CMU_ClockEnable(cmuClock_GPIO, true);
+    init.msbf         = true; // MSB first transmission for SPI compatibility
+    init.autoCsEnable = true; // Allow the USART to assert CS
+    init.baudrate     = USART_INITSYNC_BAUDRATE;
 
-#if SL_SPICTRL_MUX
-    spi_board_init();
-#endif
     // Configure SPI bus pins
     GPIO_PinModeSet(SPI_MISO_PIN.port, SPI_MISO_PIN.pin, gpioModeInput, 0);
     GPIO_PinModeSet(SPI_MOSI_PIN.port, SPI_MOSI_PIN.pin, gpioModePushPull, 0);
@@ -105,30 +95,24 @@ sl_status_t sl_si91x_host_init(void)
     // Enable clock (not needed on xG21)
     CMU_ClockEnable(SPI_USART_CMU_CLOCK, true);
 
-    // Default asynchronous initializer (master mode, 1 Mbps, 8-bit data)
-    USART_InitSync_TypeDef init = USART_INITSYNC_DEFAULT;
-
-    init.msbf         = true; // MSB first transmission for SPI compatibility
-    init.autoCsEnable = true; // Allow the USART to assert CS
-    init.baudrate     = 12500000;
     /*
-     * Route USART RX, TX, and CLK to the specified pins.  Note that CS is
-     * not controlled by USART so there is no write to the corresponding
-     * USARTROUTE register to do this.
-     */
-    GPIO->USARTROUTE[SPI_USART_ROUTE_INDEX].RXROUTE =
-        (SPI_MISO_PIN.port << _GPIO_USART_RXROUTE_PORT_SHIFT) | (SPI_MISO_PIN.pin << _GPIO_USART_RXROUTE_PIN_SHIFT);
-    GPIO->USARTROUTE[SPI_USART_ROUTE_INDEX].TXROUTE =
-        (SPI_MOSI_PIN.port << _GPIO_USART_TXROUTE_PORT_SHIFT) | (SPI_MOSI_PIN.pin << _GPIO_USART_TXROUTE_PIN_SHIFT);
-    GPIO->USARTROUTE[SPI_USART_ROUTE_INDEX].CLKROUTE =
-        (SPI_CLOCK_PIN.port << _GPIO_USART_CLKROUTE_PORT_SHIFT) | (SPI_CLOCK_PIN.pin << _GPIO_USART_CLKROUTE_PIN_SHIFT);
-    GPIO->USARTROUTE[SPI_USART_ROUTE_INDEX].CSROUTE =
-        (SPI_CS_PIN.port << _GPIO_USART_CSROUTE_PORT_SHIFT) | (SPI_CS_PIN.pin << _GPIO_USART_CSROUTE_PIN_SHIFT);
+    * Route USART RX, TX, and CLK to the specified pins.  Note that CS is
+    * not controlled by USART so there is no write to the corresponding
+    * USARTROUTE register to do this.
+    */
+    GPIO->USARTROUTE[SPI_USART_ROUTE_INDEX].RXROUTE = (SPI_MISO_PIN.port << _GPIO_USART_RXROUTE_PORT_SHIFT)
+                                                        | (SPI_MISO_PIN.pin << _GPIO_USART_RXROUTE_PIN_SHIFT);
+    GPIO->USARTROUTE[SPI_USART_ROUTE_INDEX].TXROUTE = (SPI_MOSI_PIN.port << _GPIO_USART_TXROUTE_PORT_SHIFT)
+                                                        | (SPI_MOSI_PIN.pin << _GPIO_USART_TXROUTE_PIN_SHIFT);
+    GPIO->USARTROUTE[SPI_USART_ROUTE_INDEX].CLKROUTE = (SPI_CLOCK_PIN.port << _GPIO_USART_CLKROUTE_PORT_SHIFT)
+                                                        | (SPI_CLOCK_PIN.pin << _GPIO_USART_CLKROUTE_PIN_SHIFT);
+    GPIO->USARTROUTE[SPI_USART_ROUTE_INDEX].CSROUTE = (SPI_CS_PIN.port << _GPIO_USART_CSROUTE_PORT_SHIFT)
+                                                        | (SPI_CS_PIN.pin << _GPIO_USART_CSROUTE_PIN_SHIFT);
 
     // Enable USART interface pins
     GPIO->USARTROUTE[SPI_USART_ROUTE_INDEX].ROUTEEN = GPIO_USART_ROUTEEN_RXPEN | // MISO
-        GPIO_USART_ROUTEEN_TXPEN |                                               // MOSI
-        GPIO_USART_ROUTEEN_CLKPEN | GPIO_USART_ROUTEEN_CSPEN;
+                                                        GPIO_USART_ROUTEEN_TXPEN | // MOSI
+                                                        GPIO_USART_ROUTEEN_CLKPEN | GPIO_USART_ROUTEEN_CSPEN;
 
     // Set slew rate for alternate usage pins
     GPIO_SlewrateSet(SPI_CLOCK_PIN.port, 7, 7);
@@ -138,34 +122,63 @@ sl_status_t sl_si91x_host_init(void)
 
     SPI_USART->TIMING |= /*USART_TIMING_TXDELAY_ONE | USART_TIMING_CSSETUP_ONE |*/ USART_TIMING_CSHOLD_ONE;
 
-    // SPI_USART->CTRL_SET |= USART_CTRL_SMSDELAY;
-    if (transfer_done_semaphore == NULL)
-    {
+    //SPI_USART->CTRL_SET |= USART_CTRL_SMSDELAY;
+
+    // configure packet pending interrupt priority
+    NVIC_SetPriority(GPIO_ODD_IRQn, PACKET_PENDING_INT_PRI);
+    GPIOINT_CallbackRegister(INTERRUPT_PIN.pin, gpio_interrupt);
+    GPIO_PinModeSet(INTERRUPT_PIN.port, INTERRUPT_PIN.pin, gpioModeInputPullFilter, 0);
+    GPIO_ExtIntConfig(INTERRUPT_PIN.port, INTERRUPT_PIN.pin, INTERRUPT_PIN.pin, true, false, true);
+}
+
+void sl_si91x_host_set_sleep_indicator(void)
+{
+    GPIO_PinOutSet(SLEEP_CONFIRM_PIN.port, SLEEP_CONFIRM_PIN.pin);
+}
+
+void sl_si91x_host_clear_sleep_indicator(void)
+{
+    GPIO_PinOutClear(SLEEP_CONFIRM_PIN.port, SLEEP_CONFIRM_PIN.pin);
+}
+
+uint32_t sl_si91x_host_get_wake_indicator(void)
+{
+    return GPIO_PinInGet(WAKE_INDICATOR_PIN.port, WAKE_INDICATOR_PIN.pin);
+}
+
+sl_status_t sl_si91x_host_init(sl_si91x_host_init_configuration *config)
+{
+    init_config.rx_irq  = config->rx_irq;
+    init_config.rx_done = config->rx_done;
+
+    // Enable clock (not needed on xG21)
+    CMU_ClockEnable(cmuClock_GPIO, true);
+
+#if SL_SPICTRL_MUX
+    spi_board_init();
+#endif
+
+    if (transfer_done_semaphore == NULL) {
         transfer_done_semaphore = osSemaphoreNew(1, 0, NULL);
     }
 
-    if (spi_transfer_mutex == 0)
-    {
-        spi_transfer_mutex = osMutexNew(NULL);
+    if (ncp_transfer_mutex == 0) {
+        ncp_transfer_mutex = osMutexNew(NULL);
     }
 
-    DMADRV_Init();
-    DMADRV_AllocateChannel(&rx_ldma_channel, NULL);
-    DMADRV_AllocateChannel(&tx_ldma_channel, NULL);
+    efx32_spi_init();
 
     // Start reset line low
     GPIO_PinModeSet(RESET_PIN.port, RESET_PIN.pin, gpioModePushPull, 0);
 
-    // configure packet pending interrupt priority
-    NVIC_SetPriority(GPIO_ODD_IRQn, PACKET_PENDING_INT_PRI);
-
     // Configure interrupt, sleep and wake confirmation pins
-    GPIOINT_CallbackRegister(INTERRUPT_PIN.pin, gpio_interrupt);
-    GPIO_PinModeSet(INTERRUPT_PIN.port, INTERRUPT_PIN.pin, gpioModeInputPullFilter, 0);
-    GPIO_ExtIntConfig(INTERRUPT_PIN.port, INTERRUPT_PIN.pin, INTERRUPT_PIN.pin, true, false, true);
     GPIO_PinModeSet(SLEEP_CONFIRM_PIN.port, SLEEP_CONFIRM_PIN.pin, gpioModeWiredOrPullDown, 1);
     GPIO_PinModeSet(WAKE_INDICATOR_PIN.port, WAKE_INDICATOR_PIN.pin, gpioModeWiredOrPullDown, 0);
 
+    DMADRV_Init();
+    DMADRV_AllocateChannel(&rx_ldma_channel, NULL);
+    DMADRV_AllocateChannel(&tx_ldma_channel, NULL);
+
     return SL_STATUS_OK;
 }
 
@@ -174,11 +187,7 @@ sl_status_t sl_si91x_host_deinit(void)
     return SL_STATUS_OK;
 }
 
-void sl_si91x_host_enable_high_speed_bus()
-{
-    //  SPI_USART->CTRL_SET |= USART_CTRL_SMSDELAY | USART_CTRL_SSSEARLY;
-    //  USART_BaudrateSyncSet(SPI_USART, 0, 20000000);
-}
+void sl_si91x_host_enable_high_speed_bus() { }
 
 /*==================================================================*/
 /**
@@ -192,67 +201,63 @@ void sl_si91x_host_enable_high_speed_bus()
  * @section description
  * This API is used to transfer/receive data to the Wi-Fi module through the SPI interface.
  */
-sl_status_t sl_si91x_host_spi_transfer(const void * tx_buffer, void * rx_buffer, uint16_t buffer_length)
+sl_status_t sl_si91x_host_spi_transfer(const void *tx_buffer, void *rx_buffer, uint16_t buffer_length)
 {
-    osMutexAcquire(spi_transfer_mutex, 0xFFFFFFFFUL);
+    osMutexAcquire(ncp_transfer_mutex, 0xFFFFFFFFUL);
 
 #if SL_SPICTRL_MUX
     sl_wfx_host_spi_cs_assert();
 #endif // SL_SPICTRL_MUX
 
-    if (buffer_length < 16)
-    {
-        uint8_t * tx = (tx_buffer != NULL) ? (uint8_t *) tx_buffer : (uint8_t *) &dummy_buffer;
-        uint8_t * rx = (rx_buffer != NULL) ? (uint8_t *) rx_buffer : (uint8_t *) &dummy_buffer;
-        while (buffer_length > 0)
-        {
-            while (!(SPI_USART->STATUS & USART_STATUS_TXBL))
-            {
-            }
-            SPI_USART->TXDATA = (uint32_t) *tx;
-            while (!(SPI_USART->STATUS & USART_STATUS_TXC))
-            {
-            }
-            *rx = (uint8_t) SPI_USART->RXDATA;
-            if (tx_buffer != NULL)
-            {
-                tx++;
-            }
-            if (rx_buffer != NULL)
-            {
-                rx++;
-            }
-            buffer_length--;
+    if (buffer_length < 16) {
+        uint8_t *tx = (tx_buffer != NULL) ? (uint8_t *)tx_buffer : (uint8_t *)&dummy_buffer;
+        uint8_t *rx = (rx_buffer != NULL) ? (uint8_t *)rx_buffer : (uint8_t *)&dummy_buffer;
+        while (buffer_length > 0) {
+        while (!(SPI_USART->STATUS & USART_STATUS_TXBL)) {
         }
-    }
-    else
+        SPI_USART->TXDATA = (uint32_t)*tx;
+        while (!(SPI_USART->STATUS & USART_STATUS_TXC)) {
+        }
+        *rx = (uint8_t)SPI_USART->RXDATA;
+        if (tx_buffer != NULL) {
+            tx++;
+        }
+        if (rx_buffer != NULL) {
+            rx++;
+        }
+        buffer_length--;
+        }
+    } 
+    else 
     {
-        if (tx_buffer == NULL)
+        if (tx_buffer == NULL) 
         {
             dummy_buffer = 0;
             ldmaTXDescriptor =
-                (LDMA_Descriptor_t) LDMA_DESCRIPTOR_SINGLE_P2P_BYTE(&dummy_buffer, &(SPI_USART->TXDATA), buffer_length);
-        }
-        else
+                (LDMA_Descriptor_t)LDMA_DESCRIPTOR_SINGLE_P2P_BYTE(&dummy_buffer, &(SPI_USART->TXDATA), buffer_length);
+        } 
+        else 
         {
-            ldmaTXDescriptor = (LDMA_Descriptor_t) LDMA_DESCRIPTOR_SINGLE_M2P_BYTE(tx_buffer, &(SPI_USART->TXDATA), buffer_length);
+            ldmaTXDescriptor =
+                (LDMA_Descriptor_t)LDMA_DESCRIPTOR_SINGLE_M2P_BYTE(tx_buffer, &(SPI_USART->TXDATA), buffer_length);
         }
 
-        if (rx_buffer == NULL)
+        if (rx_buffer == NULL) 
         {
             ldmaRXDescriptor =
-                (LDMA_Descriptor_t) LDMA_DESCRIPTOR_SINGLE_P2P_BYTE(&(SPI_USART->RXDATA), &dummy_buffer, buffer_length);
-        }
-        else
+                (LDMA_Descriptor_t)LDMA_DESCRIPTOR_SINGLE_P2P_BYTE(&(SPI_USART->RXDATA), &dummy_buffer, buffer_length);
+        } 
+        else 
         {
-            ldmaRXDescriptor = (LDMA_Descriptor_t) LDMA_DESCRIPTOR_SINGLE_P2M_BYTE(&(SPI_USART->RXDATA), rx_buffer, buffer_length);
+            ldmaRXDescriptor =
+                (LDMA_Descriptor_t)LDMA_DESCRIPTOR_SINGLE_P2M_BYTE(&(SPI_USART->RXDATA), rx_buffer, buffer_length);
         }
 
         // Transfer a byte on free space in the USART buffer
-        ldmaTXConfig = (LDMA_TransferCfg_t) LDMA_TRANSFER_CFG_PERIPHERAL(SPI_USART_LDMA_TX);
+        ldmaTXConfig = (LDMA_TransferCfg_t)LDMA_TRANSFER_CFG_PERIPHERAL(SPI_USART_LDMA_TX);
 
         // Transfer a byte on receive data valid
-        ldmaRXConfig = (LDMA_TransferCfg_t) LDMA_TRANSFER_CFG_PERIPHERAL(SPI_USART_LDMA_RX);
+        ldmaRXConfig = (LDMA_TransferCfg_t)LDMA_TRANSFER_CFG_PERIPHERAL(SPI_USART_LDMA_RX);
 
 #if defined(SL_CATLOG_POWER_MANAGER_PRESENT)
         sl_power_manager_remove_em_requirement(SL_POWER_MANAGER_EM1);
@@ -262,13 +267,13 @@ sl_status_t sl_si91x_host_spi_transfer(const void * tx_buffer, void * rx_buffer,
         DMADRV_LdmaStartTransfer(rx_ldma_channel, &ldmaRXConfig, &ldmaRXDescriptor, dma_callback, NULL);
         DMADRV_LdmaStartTransfer(tx_ldma_channel, &ldmaTXConfig, &ldmaTXDescriptor, NULL, NULL);
 
-        if (osSemaphoreAcquire(transfer_done_semaphore, 1000) != osOK)
+        if (osSemaphoreAcquire(transfer_done_semaphore, 1000) != osOK) 
         {
             BREAKPOINT();
         }
     }
 
-    osMutexRelease(spi_transfer_mutex);
+    osMutexRelease(ncp_transfer_mutex);
 #if SL_SPICTRL_MUX
     sl_wfx_host_spi_cs_deassert();
 #endif // SL_SPICTRL_MUX
@@ -288,6 +293,7 @@ void sl_si91x_host_release_from_reset(void)
 
 void sl_si91x_host_enable_bus_interrupt(void)
 {
+    NVIC_ClearPendingIRQ(GPIO_ODD_IRQn);
     NVIC_EnableIRQ(GPIO_ODD_IRQn);
 }
 

examples/platform/silabs/efr32/rs911x/rs9117.gni

@@ -27,7 +27,8 @@ rs9117_src_sapi = [
   "${wifi_sdk_root}/components/device/silabs/si91x/wireless/sl_net/src/sl_net_rsi_utility.c",
   "${wifi_sdk_root}/components/device/silabs/si91x/wireless/sl_net/src/sl_net_si91x_integration_handler.c",
   "${wifi_sdk_root}/components/device/silabs/si91x/wireless/sl_net/src/sl_si91x_net_credentials.c",
-  "${wifi_sdk_root}/components/device/silabs/si91x/wireless/spi_interface/sl_si91x_spi_driver.c",
+  "${wifi_sdk_root}/components/device/silabs/si91x/wireless/ncp_interface/spi/sl_si91x_spi.c",
+  "${wifi_sdk_root}/components/device/silabs/si91x/wireless/ncp_interface/sl_si91x_ncp_driver.c",
 
   # wifi component
   "${wifi_sdk_root}/components/protocol/wifi/src/sl_wifi_callback_framework.c",

src/platform/silabs/SilabsConfig.cpp

@@ -35,6 +35,7 @@
 
 #include <FreeRTOS.h>
 #include <semphr.h>
+#ifndef SIWX_917
 // Substitute the GSDK weak nvm3_lockBegin and nvm3_lockEnd
 // for an application controlled re-entrance protection
 static SemaphoreHandle_t nvm3_Sem;
@@ -57,6 +58,7 @@ void nvm3_lockEnd(void)
     VerifyOrDie(nvm3_Sem != NULL);
     xSemaphoreGive(nvm3_Sem);
 }
+#endif
 
 namespace chip {
 namespace DeviceLayer {
@@ -76,9 +78,9 @@ CHIP_ERROR SilabsConfig::Init()
 
 void SilabsConfig::DeInit()
 {
-#ifndef BRD4325A // TODO: fix semaphore usage in nvm3_lock for siwx917. use weak implementation for that board instead
+#ifndef SIWX_917
     vSemaphoreDelete(nvm3_Sem);
-#endif // not BRD4325A
+#endif // not SIWX_917
     nvm3_close(nvm3_defaultHandle);
 }