optiboot_x: How are different entry conditions specified for the precompiled hex?

[xieliwei]

Looking into customizing the optiboot_x loader for a project and I noticed that the ENTRYCOND_REQUIRE options defined in the Makefile aren't being used anymore. Instead we have some new flags START_APP_ON_POR and ASSUME_DIRECT_ENTRY_SAFE.

megaTinyCore/megaavr/bootloaders/optiboot_x/optiboot_x.c

Lines 376 to 394 in 672e35e

	#ifdef START_APP_ON_POR
	// If WDRF is set OR nothing except BORF and PORF are set, that's not bootloader entry condition
	// so jump to app - this is for when UPDI pin is used as reset, so we go straight to app on start.
	// 11/14: NASTY bug - we also need to check for no reset flags being set (ie, direct entry)
	// and run bootloader in that case, otherwise bootloader won't run, among other things, after fresh
	// bootloading!
	#ifndef ASSUME_DIRECT_ENTRY_SAFE
	if ((ch & RSTCTRL_WDRF_bm || (!(ch & (~(RSTCTRL_BORF_bm | RSTCTRL_PORF_bm)))))) {
	#else
	if (ch && (ch & RSTCTRL_WDRF_bm || (!(ch & (~(RSTCTRL_BORF_bm | RSTCTRL_PORF_bm)))))) {
	#endif
	#else
	// If WDRF is set OR nothing except BORF is set, that's not bootloader entry condition so jump to app
	#ifndef ASSUME_DIRECT_ENTRY_SAFE
	if ((ch & RSTCTRL_WDRF_bm || (!(ch & (~RSTCTRL_BORF_bm))))) {
	#else
	if (ch && (ch & RSTCTRL_WDRF_bm || (!(ch & (~RSTCTRL_BORF_bm))))) {
	#endif
	#endif

Is there a reason why we stopped using ENTRYCOND_REQUIRE? Looking at the source, it seems like we only have four options:

1. Bootloader unless WDR, BOR or POR is triggered
2. Bootloader unless WDR, BOR or POR is triggered, reboot if unclean start
3. Bootloader unless WDR, BOR is triggered
4. Bootloader unless WDR, BOR is triggered, reboot if unclean start

(By the way, I think there is no need to have separate versions of the if statement for ASSUME_DIRECT_ENTRY_SAFE as ch == 0 is already handled earlier on if ASSUME_DIRECT_ENTRY_SAFE is defined.)

megaTinyCore/megaavr/bootloaders/optiboot_x/optiboot_x.c

Lines 371 to 375 in 672e35e

	#ifndef ASSUME_DIRECT_ENTRY_SAFE
	if (ch==0) {
	_PROTECTED_WRITE(RSTCTRL_SWRR,0x01);
	}
	#endif

Does that mean we don't actually have the 7 possible combinations of entry conditions as mentioned by the README? In fact, if the Makefile is used, there's only one option being built (number 4 above), since neither START_APP_ON_POR nor ASSUME_DIRECT_ENTRY_SAFE are defined. Is this intentional?

[SpenceKonde]

Where the hell did that version of the file come from? That doesn't match the file I build the bootloader binaries from.

And assume direct entry safe is insanity. You can't EVER assume that! It is in fact guaranteed that the bootloader will never function correctly upon direct entry from a sketch compiled for megaTinyCore without more code in the app to make that jump safe than a software reset takes (which is 8-10 bytes, depending on whether the compiler happens to have any registers it knows can only contain a 1 that it can reuse). Thus, nobody who would be capable of making their app safely perform direct entry would ever attempt it, because they could simply perform a software reset, use less flash, expose themselves to fewer hazards). Just off the top of my head, the direct jump itself is 4 bytes (jmp) plus 10 bytes to reset the prescaler for the system clock to the power on setting (we do not support operating at the chips' default power-on F_CPU of 2.67 or 3.33 MHz - 16/6 or 20/6) is the bare minimum; if the same UART has been used, any register not written by the bootloader at initialization which will have observable effects on operation must be reset as well. If either of the pins of the UART were inverted, or used to trigger an interrupt, or had input disabled, that must be reset as well. And so on. The software reset command provides an incredibly economical way to reset registers to power on values

Especially with the actual code (not that ancient version), which detects if no flags are set, and would fire software reset anyway if there aren't any set. Otherwise, if it's an entry condition it starts the bootloader, else it clears the reset flags, stashes their old value in GPIOR. (the flags are not cleared until the jump to the app - that way we preserve the cause of the reset that entered the bootloader when an entry condition is met.

The ENTRY_CONDITION_REQUIRE absolutely is used to build the binaries.

i don't know how the file was not updated when I changed it in the build location, but apparently I didn't copy it back to the repo (remember, I don't know shit about how to set up working build environments, so I use scripts that assume I've copied the optiboot_x directory into (arduino 1.0.6 install location)/hardware/arduino/avr/bootloaders, and that the toolchain package that came with 1.0.6 has been updated to the one distributed with the core (because that's exactly what I do) - thus there are two distinct copies of the contents of the optiboot_x directory, one of them in github and my local repo, and a second one in the build directory, which have to be manually kept in sync

[xieliwei]

Odd, what I've quoted are literally what's on the master branch of this repo. I've also checked with a quick re-install of Arduino + megaTinyCore from the board manager, and the same outdated optiboot_x.c is in the Arduino15\packages\megaTinyCore\hardware\megaavr\2.6.8\bootloaders\optiboot_x folder.

If what you are using is different, where can I get a copy of what you're using from?

[xieliwei]

I looked through the history of the optiboot_x.c file and it does seem like a commit from Dec 27 2022 was what put the outdated version in:
f25e882

Seems like I should be using the version just prior to base my modifications off on.

Edit: Okay that's not it either. That is an even older version. So where's the one that uses ENTRYCOND_REQUIRE?

Edit2: Looks like the new optiboot_x.c wasn't checked in when the new version using ENTRYCOND_REQUIRE was committed: 1f2bb69

[SpenceKonde]

THE VERSION YOU NEED WAS NEVER COMMITTED TO GITHUB. There is no copy of it anywhere in the world other than my computer (and since, my earlier reply, the google drive backup, because it's been copied back to repo folder but it is not ready to commit yet, some of the comments are fucked up and itdoesn't pass codespell. The files were dated 12/31/22 and 1/1/23.

The ENTRYCOND_REQUIRE was done AFTER ALL OF THOSE VERSIONS. I am currently in the process of tidying up the file and running spellcheck before checking it in.

What are you planning to modify? There are a whole bunch of hazards that are easy to get caught by if you are used to classic AVRs and/or sane design decisions

[xieliwei]

Got it, I'll do with what is currently available until you have your version committed.

Nothing too drastic really, just enabling the RS485 flag so the XDIR pin activates. Most of the work is adjusting pin_defs_x.h to include definitions for the XDIR pin so we can set it to output.

[SpenceKonde]

474       0       0     474     1da optiboot_txyz_all8sec.elf
474       0       0     474     1da optiboot_txyz_poronly8sec.elf
474       0       0     474     1da optiboot_txyz_swronly8sec.elf
474       0       0     474     1da optiboot_txyz_extronly.elf
474       0       0     474     1da optiboot_txyz_extr.elf
474       0       0     474     1da optiboot_txyz_extr8sec.elf
476       0       0     476     1dc optiboot_txyz_alt_all8sec.elf
476       0       0     476     1dc optiboot_txyz_alt_poronly8sec.elf
476       0       0     476     1dc optiboot_txyz_alt_swronly8sec.elf
476       0       0     476     1dc optiboot_txyz_alt_extronly.elf
476       0       0     476     1dc optiboot_txyz_alt_extr.elf
476       0       0     476     1dc optiboot_txyz_alt_extr8sec.elf
474       0       0     474     1da optiboot_txy2_all8sec.elf
474       0       0     474     1da optiboot_txy2_poronly8sec.elf
474       0       0     474     1da optiboot_txy2_swronly8sec.elf
474       0       0     474     1da optiboot_txy2_extronly.elf
474       0       0     474     1da optiboot_txy2_extr.elf
474       0       0     474     1da optiboot_txy2_extr8sec.elf
476       0       0     476     1dc optiboot_txy2_alt_all8sec.elf
476       0       0     476     1dc optiboot_txy2_alt_poronly8sec.elf
476       0       0     476     1dc optiboot_txy2_alt_swronly8sec.elf
476       0       0     476     1dc optiboot_txy2_alt_extronly.elf
476       0       0     476     1dc optiboot_txy2_alt_extr.elf
476       0       0     476     1dc optiboot_txy2_alt_extr8sec.elf
474       0       0     474     1da optiboot_tx2z_all8sec.elf
474       0       0     474     1da optiboot_tx2z_poronly8sec.elf
474       0       0     474     1da optiboot_tx2z_swronly8sec.elf
474       0       0     474     1da optiboot_tx2z_extronly.elf
474       0       0     474     1da optiboot_tx2z_extr.elf
474       0       0     474     1da optiboot_tx2z_extr8sec.elf
476       0       0     476     1dc optiboot_tx2z_alt_all8sec.elf
476       0       0     476     1dc optiboot_tx2z_alt_poronly8sec.elf
476       0       0     476     1dc optiboot_tx2z_alt_swronly8sec.elf
476       0       0     476     1dc optiboot_tx2z_alt_extronly.elf
476       0       0     476     1dc optiboot_tx2z_alt_extr.elf
476       0       0     476     1dc optiboot_tx2z_alt_extr8sec.elf
476       0       0     476     1dc optiboot_tx2z_u1alt_all8sec.elf
476       0       0     476     1dc optiboot_tx2z_u1alt_poronly8sec.elf
476       0       0     476     1dc optiboot_tx2z_u1alt_swronly8sec.elf
476       0       0     476     1dc optiboot_tx2z_u1alt_extronly.elf
476       0       0     476     1dc optiboot_tx2z_u1alt_extr.elf
476       0       0     476     1dc optiboot_tx2z_u1alt_extr8sec.elf
474       0       0     474     1da optiboot_curiosity3217_all8sec.elf
474       0       0     474     1da optiboot_curiosity3217_poronly8sec.elf
474       0       0     474     1da optiboot_curiosity3217_swronly8sec.elf
474       0       0     474     1da optiboot_curiosity1607_all8sec.elf
474       0       0     474     1da optiboot_curiosity1607_poronly8sec.elf
474       0       0     474     1da optiboot_curiosity1607_swronly8sec.elf
474       0       0     474     1da optiboot_curiosity1627_all8sec.elf
474       0       0     474     1da optiboot_curiosity1627_poronly8sec.elf
474       0       0     474     1da optiboot_curiosity1627_swronly8sec.elf
474       0       0     474     1da optiboot_curiosity1627_extronly.elf
474       0       0     474     1da optiboot_curiosity1627_extr.elf
474       0       0     474     1da optiboot_curiosity1627_extr8sec.elf
476       0       0     476     1dc optiboot_xplainedpro3217_all8sec.elf
476       0       0     476     1dc optiboot_xplainedpro3217_poronly8sec.elf
476       0       0     476     1dc optiboot_xplainedpro3217_swronly8sec.elf
474       0       0     474     1da optiboot_xplainedpro817_all8sec.elf
474       0       0     474     1da optiboot_xplainedpro817_poronly8sec.elf
474       0       0     474     1da optiboot_xplainedpro817_swronly8sec.elf
474       0       0     474     1da optiboot_xplainedmini817_all8sec.elf
474       0       0     474     1da optiboot_xplainedmini817_poronly8sec.elf
474       0       0     474     1da optiboot_xplainedmini817_swronly8sec.elf
476       0       0     476     1dc optiboot_xplainednano416_all8sec.elf
476       0       0     476     1dc optiboot_xplainednano416_poronly8sec.elf
476       0       0     476     1dc optiboot_xplainednano416_swronly8sec.elf
474       0       0     474     1da optiboot_txyz_porswr8sec.elf
476       0       0     476     1dc optiboot_txyz_alt_porswr8sec.elf
474       0       0     474     1da optiboot_txy2_porswr8sec.elf
476       0       0     476     1dc optiboot_txy2_alt_porswr8sec.elf
474       0       0     474     1da optiboot_tx2z_porswr8sec.elf
476       0       0     476     1dc optiboot_tx2z_alt_porswr8sec.elf
476       0       0     476     1dc optiboot_tx2z_u1alt_porswr8sec.elf
474       0       0     474     1da optiboot_curiosity3217_porswr8sec.elf
474       0       0     474     1da optiboot_curiosity1607_porswr8sec.elf
474       0       0     474     1da optiboot_curiosity1627_porswr8sec.elf
476       0       0     476     1dc optiboot_xplainedpro3217_porswr8sec.elf
474       0       0     474     1da optiboot_xplainedpro817_porswr8sec.elf
474       0       0     474     1da optiboot_xplainedmini817_porswr8sec.elf
476       0       0     476     1dc optiboot_xplainednano416_porswr8sec.elf

I got rid of the dummy app!!! So I can drop back to normal avrsize instead of the much larger output of avr-siize -A

[SpenceKonde]

Changes checked in. Can anyone test some of the bootloaders and make sure I didn't break anything? I see no red flags in the assembly listings, except that almost every byte is different indicating that I did something that caused the compiler to make a decision with wide-ranging consequences for the form of the emitted hex file

boot_opt.h removed because it was unused, because boot.h was unused, because boot.h only applies to classic AVRs