fix floor ceil

Tencent · Aug 26, 2024 · a9f8d24 · a9f8d24
1 parent 2463454
commit a9f8d24
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Showing 2 changed files with 4 additions and 12 deletions.
diff --git a/src/layer/riscv/unaryop_riscv.cpp b/src/layer/riscv/unaryop_riscv.cpp
@@ -88,19 +88,15 @@ struct unary_op_floor
 {
     vfloat32m8_t operator()(const vfloat32m8_t& x, const size_t& vl) const
     {
-        vint32m8_t _xi = __riscv_vfcvt_x_f_v_i32m8(x, vl);
-        vbool4_t _mask = __riscv_vmfgt_vv_f32m8_b4(__riscv_vfcvt_f_x_v_f32m8(_xi, vl), x, vl);
-        return __riscv_vfcvt_f_x_v_f32m8(__riscv_vsub_vx_i32m8_m(_mask, _xi, 1, vl), vl);
+        return __riscv_vfcvt_f_x_v_f32m8(__riscv_vfcvt_x_f_v_i32m8_rm(x, __RISCV_FRM_RDN, vl), vl);
     }
 };
 
 struct unary_op_ceil
 {
     vfloat32m8_t operator()(const vfloat32m8_t& x, const size_t& vl) const
     {
-        vint32m8_t _xi = __riscv_vfcvt_x_f_v_i32m8(x, vl);
-        vbool4_t _mask = __riscv_vmflt_vv_f32m8_b4(__riscv_vfcvt_f_x_v_f32m8(_xi, vl), x, vl);
-        return __riscv_vfcvt_f_x_v_f32m8(__riscv_vadd_vx_i32m8_m(_mask, _xi, 1, vl), vl);
+        return __riscv_vfcvt_f_x_v_f32m8(__riscv_vfcvt_x_f_v_i32m8_rm(x, __RISCV_FRM_RUP, vl), vl);
     }
 };
 

diff --git a/src/layer/riscv/unaryop_riscv_zvfh.cpp b/src/layer/riscv/unaryop_riscv_zvfh.cpp
@@ -81,19 +81,15 @@ struct unary_op_floor_fp16s
 {
     vfloat16m8_t operator()(const vfloat16m8_t& x, const size_t& vl) const
     {
-        vint16m8_t _xi = __riscv_vfcvt_x_f_v_i16m8(x, vl);
-        vbool2_t _mask = __riscv_vmfgt_vv_f16m8_b2(__riscv_vfcvt_f_x_v_f16m8(_xi, vl), x, vl);
-        return __riscv_vfcvt_f_x_v_f16m8(__riscv_vsub_vx_i16m8_m(_mask, _xi, 1, vl), vl);
+        return __riscv_vfcvt_f_x_v_f16m8(__riscv_vfcvt_x_f_v_i16m8_rm(x, __RISCV_FRM_RDN, vl), vl);
     }
 };
 
 struct unary_op_ceil_fp16s
 {
     vfloat16m8_t operator()(const vfloat16m8_t& x, const size_t& vl) const
     {
-        vint16m8_t _xi = __riscv_vfcvt_x_f_v_i16m8(x, vl);
-        vbool2_t _mask = __riscv_vmflt_vv_f16m8_b2(__riscv_vfcvt_f_x_v_f16m8(_xi, vl), x, vl);
-        return __riscv_vfcvt_f_x_v_f16m8(__riscv_vadd_vx_i16m8_m(_mask, _xi, 1, vl), vl);
+        return __riscv_vfcvt_f_x_v_f16m8(__riscv_vfcvt_x_f_v_i16m8_rm(x, __RISCV_FRM_RUP, vl), vl);
     }
 };