added pseudo op for jalr format used Hennesy&Patterson

[BenjaminBeichler]

Unfortunately "Computer Organization and Design RISC-V Edition" use in their examples a non-standard format for jalr. To simply copy and paste their programs, add this pseudo op.

[TheThirdOne]

It does appear that gcc also supports this so I think it's reasonable to support it. With the one issue of 10 vs -100 resolved I would be happy to merge this.

Thanks for jumping in to add this.

[BenjaminBeichler]

ahh thanks, I didn't fully understand the pseudo ops file format :-) I just updated my branch

[TheThirdOne]

It definitely is a little confusing and the comments are actually out of date. The only reason I noticed is because I work with the assembler code.

I actually don't see what you changed by the force push. I only see the commit and signature change.

[BenjaminBeichler]

yeah, I forgot to add the real change ... somehow it resulted still in a new commit, what confused me. It should be really fixed now.

[TheThirdOne]

I suspect you made the first commit on Github, and then made the change on a local repo. That would result in the two commits being different because one was signed and the other was not.

Anyway it looks good now.

[Jonas-Salcedo]

Wow! I think I commented on this a few weeks ago. I didn't expect you to actually add it. Thanks a lot!

[TheThirdOne]

@fudgenuggets12, You should be grateful to BenjaminBeichler. Without him this would not have gotten added; I didn't know if this was a common format. I did ask you at the time where you had seen it formatted like that.

Is there some book / tutorial that uses that syntax? It seems to definitely not be the standard, but the gnu assembler does allow it without warnings.

If you had told me that Patterson and Hennessy wrote it like that, I would have added it then. Because you additionally were concerned about why your program was infinitely looping, I explained why rather than probe you for information about the format.

If you notice something off in the future, a little bit of context can help get me to actually add something. I don't teach students RISC-V assembly and don't own a copy of the Patterson and Hennessy RISC-V edition so I have a substantial blind spot with regards to what a lot of users want.