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fby3.5: bb: Optimize CPLD update (facebook#268)
Summary: - Modify struct variable name. - Define delay time. - Define LSB to MSB function and add explaining comment. Pull Request resolved: facebook#268 Test Plan: - Build code: Pass - Update CPLD: Pass Log: 1. Check update CPLD is successful. root@bmc-oob:~# fw-util slot1 --version bb_cpld BB CPLD Version: 00030E05 BB CPLD Version After activation: 00030E05 root@bmc-oob:~# fw-util slot1 --force --update bb_cpld Y35CBB_E06.rpd Failed to get board revision ID slot_id: 1, comp: f, intf: 0, img: Y35CBB_E06.rpd, force: 1 Set fan mode to manual and set PWM to 70% OnChip Flash Status = 0xFFFFFE00., slot_id 0x1, sectype 0x1, intf: 0x10, read 143360 bytes. Erase sector SUCCESS. Erase sector SUCCESS. updated cpld: 100 % Elapsed time: 57 sec. Set fan mode to auto and start fscd Force upgrade of slot1 : bb_cpld succeeded root@bmc-oob:~# power-util sled-cycle packet_write_wait: Connection to 192.168.88.24 port 22: Broken pipe root@bmc-oob:~# fw-util slot1 --version bb_cpld BB CPLD Version: 00030E06 BB CPLD Version After activation: 00030E06 Reviewed By: garnermic Differential Revision: D36076646 Pulled By: GoldenBug fbshipit-source-id: 931efefe0ccc65a89afb65e2ae09b0a59a0d23d6
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