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[Vivado.sim] re-enable checks for tb.top
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kammoh committed Sep 27, 2024
1 parent d1f7e01 commit 8c1c8be
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Showing 2 changed files with 26 additions and 3 deletions.
2 changes: 1 addition & 1 deletion src/xeda/design.py
Original file line number Diff line number Diff line change
Expand Up @@ -71,7 +71,7 @@ def __init__(
file: Optional[str] = None,
) -> None:
super().__init__(*args)
self.errors = errors # location, msg, type/context
self.errors = errors # (location, message, context, type)
self.data = data
self.design_root = design_root
self.design_name = design_name
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27 changes: 25 additions & 2 deletions src/xeda/flows/vivado/vivado_sim.py
Original file line number Diff line number Diff line change
Expand Up @@ -2,6 +2,7 @@
from typing import List, Optional

from ...dataclass import Field
from ...design import DesignValidationError
from ...utils import SDF
from ...flow import SimFlow
from ..vivado import Vivado
Expand Down Expand Up @@ -45,8 +46,30 @@ def run(self) -> None:
if elab_debug:
ss.elab_flags.append(f"-debug {elab_debug}")

assert self.design.tb
# assert self.design.sim_tops, "tb.top was not specified"
if not self.design.tb:
raise DesignValidationError(
[
(
None,
"No testbench ('tb') is specified in the design",
None,
None,
)
],
self.design.dict(),
)
if not self.design.sim_tops:
raise DesignValidationError(
[
(
None,
"VivadoSim requires simulation top but 'tb.top' was not specified in the design",
None,
None,
)
],
self.design.dict(),
)
if ss.vcd:
log.info("Dumping VCD to %s", self.run_path / ss.vcd)
sdf_root = ss.sdf.root
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