Merge pull request #212 from Xilinx/ferdinand.update_log2_pdll_return…

…_value PDLL builtins: Allow float log2 to return even if the log2 is not exact
Xilinx · Jul 10, 2024 · 54e2843 · 54e2843
2 parents ecad3c5 + 31a681d
commit 54e2843
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Showing 2 changed files with 13 additions and 1 deletion.
diff --git a/mlir/lib/Dialect/PDL/IR/Builtins.cpp b/mlir/lib/Dialect/PDL/IR/Builtins.cpp
@@ -169,7 +169,7 @@ LogicalResult static unaryOp(PatternRewriter &rewriter, PDLResultList &results,
     } else if constexpr (T == UnaryOpKind::log2) {
       results.push_back(rewriter.getFloatAttr(
           operandFloatAttr.getType(),
-          (double)operandFloatAttr.getValue().getExactLog2()));
+          std::log2(operandFloatAttr.getValueAsDouble())));
     } else if constexpr (T == UnaryOpKind::abs) {
       auto resultVal = operandFloatAttr.getValue();
       resultVal.clearSign();

diff --git a/mlir/unittests/Dialect/PDL/BuiltinTest.cpp b/mlir/unittests/Dialect/PDL/BuiltinTest.cpp
@@ -634,6 +634,18 @@ TEST_F(BuiltinTest, log2) {
         cast<FloatAttr>(result.cast<Attribute>()).getValue().convertToFloat(),
         2.0);
   }
+
+  auto threeF16 = rewriter.getF16FloatAttr(3.0);
+
+  // check correctness
+  {
+    TestPDLResultList results(1);
+    EXPECT_TRUE(builtin::log2(rewriter, results, {threeF16}).succeeded());
+
+    PDLValue result = results.getResults()[0];
+    float resultVal = cast<FloatAttr>(result.cast<Attribute>()).getValue().convertToFloat();
+    EXPECT_TRUE(resultVal > 1.58 && resultVal < 1.59);
+  }
 }
 
 TEST_F(BuiltinTest, exp2) {