Support PCS frames in bitstream

YosysHQ · Oct 4, 2023 · cbc3651 · cbc3651
1 parent 36c615d
commit cbc3651
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Showing 5 changed files with 74 additions and 0 deletions.
diff --git a/libtrellis/include/Bitstream.hpp b/libtrellis/include/Bitstream.hpp
@@ -35,6 +35,7 @@ enum class BitstreamCommand : uint8_t {
     ISC_PROGRAM_USERCODE_2 = 0b11000011,
     ISC_PROGRAM_DONE_2 = 0b01111010,
     WRITE_INC_FRAME = 0b01000001,
+    LSC_WRITE_PCS = 0b01110010,
     DUMMY = 0b11111111,
 };
 

diff --git a/libtrellis/include/Chip.hpp b/libtrellis/include/Chip.hpp
@@ -172,6 +172,9 @@ class Chip
     // BRAM block data size
     int bram_data_size;
 
+    // PCS data
+    map<uint8_t, vector<uint8_t>> pcs_data;
+
     // Globals data- Should be a variant, but I couldn't get boost::python
     // to behave with boost::variant.
     Ecp5GlobalsInfo global_data_ecp5;

diff --git a/libtrellis/include/ChipConfig.hpp b/libtrellis/include/ChipConfig.hpp
@@ -34,6 +34,8 @@ class ChipConfig
     // Block RAM initialisation (WIP)
     map<uint16_t, vector<uint16_t>> bram_data;
 
+    map<uint8_t, vector<uint8_t>> pcs_data;
+
     string to_string() const;
     static ChipConfig from_string(const string &config);
     Chip to_chip() const;

diff --git a/libtrellis/src/Bitstream.cpp b/libtrellis/src/Bitstream.cpp
@@ -790,6 +790,42 @@ Chip Bitstream::deserialise_chip(boost::optional<uint32_t> idcode) {
                 BITSTREAM_DEBUG("set sed crc to 0x" << hex << setw(8) << setfill('0') << cfg);
             }
                 break;
+            case BitstreamCommand::LSC_WRITE_PCS: {
+                uint8_t id = rd.get_byte();
+                if (id != 0x10) {
+                    BITSTREAM_FATAL("unsupported LSC_WRITE_PCS with unknown id " << hex << setw(2) << id,rd.get_offset());
+                }
+                uint8_t addr = rd.get_byte();
+                uint8_t size = rd.get_byte();
+                switch (addr)
+                {
+                case 0x40: // I2C Primary
+                    if (size != 0x05)
+                        BITSTREAM_FATAL("unsupported LSC_WRITE_PCS for I2C with size " << hex << setw(2) << size,rd.get_offset());
+                    break;
+                case 0x4A: // I2C Secondary
+                    if (size != 0x05)
+                        BITSTREAM_FATAL("unsupported LSC_WRITE_PCS for I2C with size " << hex << setw(2) << size,rd.get_offset());
+                    break;
+                case 0x54: // SPI
+                    if (size != 0x0A)
+                        BITSTREAM_FATAL("unsupported LSC_WRITE_PCS for SPI with size " << hex << setw(2) << size,rd.get_offset());
+                    break;
+                case 0x5E: // Timer/Counter
+                    if (size != 0x12)
+                        BITSTREAM_FATAL("unsupported LSC_WRITE_PCS for TC with size " << hex << setw(2) << size,rd.get_offset());
+                    break;
+                default:
+                    BITSTREAM_FATAL("unsupported LSC_WRITE_PCS with address " << hex << setw(2) << addr,rd.get_offset());
+                    break;
+                }
+                chip->pcs_data[addr].resize(size);
+                for(uint8_t i=0;i<size;i++) {
+                    chip->pcs_data[addr][i] = rd.get_byte();
+                }
+                BITSTREAM_DEBUG("pcs frame");
+            }
+                break;
             case BitstreamCommand::DUMMY:
                 break;
             default: BITSTREAM_FATAL("unsupported command 0x" << hex << setw(2) << setfill('0') << int(cmd),
@@ -971,6 +1007,16 @@ Bitstream Bitstream::serialise_chip(const Chip &chip, const map<string, string>
     // Post-bitstream space for SECURITY and SED (not used here)
     wr.insert_dummy(ops.security_sed_space);
 
+    for (const auto &pcs : chip.pcs_data) {
+        wr.write_byte(uint8_t(BitstreamCommand::LSC_WRITE_PCS));
+        wr.write_byte(0x10);
+        wr.write_byte(uint8_t(pcs.first));
+        wr.write_byte(uint8_t(pcs.second.size()));
+        for (size_t i = 0; i < pcs.second.size(); i++) {
+            wr.write_byte(pcs.second[i]);
+        }
+    }
+
     // Program Usercode
     wr.write_byte(uint8_t(BitstreamCommand::ISC_PROGRAM_USERCODE));
     wr.write_byte(0x80);

diff --git a/libtrellis/src/ChipConfig.cpp b/libtrellis/src/ChipConfig.cpp
@@ -39,6 +39,16 @@ string ChipConfig::to_string() const
         ss.flags(f);
         ss << endl;
     }
+    for (const auto &pcs : pcs_data) {
+        ss << ".pcs " << setw(2) << setfill('0') << hex << int(pcs.first) << endl;
+        ios_base::fmtflags f( ss.flags() );
+        for (size_t i = 0; i < pcs.second.size(); i++) {
+            ss << setw(2) << setfill('0') << hex << int(pcs.second.at(i));
+            ss << " ";
+        }
+        ss.flags(f);
+        ss << endl;
+    }
     for (const auto &tg : tilegroups) {
         ss << ".tile_group";
         for (const auto &tile : tg.tiles) {
@@ -87,6 +97,16 @@ ChipConfig ChipConfig::from_string(const string &config)
                 cc.bram_data[bram].push_back(value);
             }
             ss.flags(f);
+        } else if (verb == ".pcs") {
+            int pcs;
+            ss >> hex >> pcs;
+            ios_base::fmtflags f(ss.flags());
+            while (!skip_check_eor(ss)) {
+                int value;
+                ss >> hex >> value;
+                cc.pcs_data[pcs].push_back(uint8_t(value));
+            }
+            ss.flags(f);
         } else if (verb == ".tile_group") {
             TileGroup tg;
             std::string line;
@@ -112,6 +132,7 @@ Chip ChipConfig::to_chip() const
     Chip c(chip_name, chip_variant);
     c.metadata = metadata;
     c.bram_data = bram_data;
+    c.pcs_data = pcs_data;
     set<string> processed_tiles;
     for (auto tile_entry : c.tiles) {
         auto tile_db = get_tile_bitdata(TileLocator{c.info.family, c.info.name, tile_entry.second->info.type});
@@ -154,6 +175,7 @@ ChipConfig ChipConfig::from_chip(const Chip &chip)
     cc.chip_variant = chip.info.variant;
     cc.metadata = chip.metadata;
     cc.bram_data = chip.bram_data;
+    cc.pcs_data = chip.pcs_data;
     for (auto tile : chip.tiles) {
         auto tile_db = get_tile_bitdata(TileLocator{chip.info.family, chip.info.name, tile.second->info.type});
         cc.tiles[tile.first] = tile_db->tile_cram_to_config(tile.second->cram);