Run dffunmap before writing the design with aiger/btor/smt2 backends.

YosysHQ · Jul 31, 2020 · b172357 · b172357
1 parent b6dc1c9
commit b172357
Showing 1 changed file with 3 additions and 0 deletions.
diff --git a/sbysrc/sby_core.py b/sbysrc/sby_core.py
@@ -401,6 +401,7 @@ def make_model(self, model_name):
                     print("opt -fast", file=f)
                     print("abc", file=f)
                     print("opt_clean", file=f)
+                print("dffunmap", file=f)
                 print("stat", file=f)
                 if "_stbv" in model_name:
                     print("write_smt2 -stbv -wires design_{}.smt2".format(model_name), file=f)
@@ -430,6 +431,7 @@ def make_model(self, model_name):
                 else:
                     print("opt -fast", file=f)
                 print("delete -output", file=f)
+                print("dffunmap", file=f)
                 print("stat", file=f)
                 print("write_btor {}-i design_{m}.info design_{m}.btor".format("-c " if self.opt_mode == "cover" else "", m=model_name), file=f)
 
@@ -450,6 +452,7 @@ def make_model(self, model_name):
                 print("opt -full", file=f)
                 print("techmap", file=f)
                 print("opt -fast", file=f)
+                print("dffunmap", file=f)
                 print("abc -g AND -fast", file=f)
                 print("opt_clean", file=f)
                 print("stat", file=f)