fix colliding ISRs by making sure they each get memoized (#60)

* fix colliding ISRs by making sure they each get memoized

* add change from regz codegen

src/core/microzig.zig

@@ -68,7 +68,22 @@ usingnamespace if (@hasDecl(app, "log"))
         pub const log = app.log;
     }
 else
-    struct {};
+    struct {
+        // log is a no-op by default. Parts of microzig use the stdlib logging
+        // facility and compilations will now fail on freestanding systems that
+        // use it but do not explicitly set `root.log`
+        pub fn log(
+            comptime message_level: std.log.Level,
+            comptime scope: @Type(.EnumLiteral),
+            comptime format: []const u8,
+            args: anytype,
+        ) void {
+            _ = message_level;
+            _ = scope;
+            _ = format;
+            _ = args;
+        }
+    };
 
 /// The microzig default panic handler. Will disable interrupts and loop endlessly.
 pub fn microzig_panic(message: []const u8, maybe_stack_trace: ?*std.builtin.StackTrace) noreturn {

src/modules/chips/atmega328p/registers.zig

@@ -61,10 +61,8 @@ pub const VectorTable = extern struct {
 };
 
 pub const registers = struct {
-
     /// Fuses
     pub const FUSE = struct {
-
         /// address: 0x2
         pub const EXTENDED = @intToPtr(*volatile Mmio(8, packed struct {
             /// Brown-out Detector trigger level
@@ -173,7 +171,6 @@ pub const registers = struct {
 
     /// Lockbits
     pub const LOCKBIT = struct {
-
         /// address: 0x0
         pub const LOCKBIT = @intToPtr(*volatile Mmio(8, packed struct {
             /// Memory Lock
@@ -203,7 +200,6 @@ pub const registers = struct {
 
     /// USART
     pub const USART0 = struct {
-
         /// address: 0xc6
         /// USART I/O Data Register
         pub const UDR0 = @intToPtr(*volatile u8, 0xc6);
@@ -284,7 +280,6 @@ pub const registers = struct {
 
     /// Two Wire Serial Interface
     pub const TWI = struct {
-
         /// address: 0xbd
         /// TWI (Slave) Address Mask Register
         pub const TWAMR = @intToPtr(*volatile Mmio(8, packed struct {
@@ -347,7 +342,6 @@ pub const registers = struct {
 
     /// Timer/Counter, 16-bit
     pub const TC1 = struct {
-
         /// address: 0x6f
         /// Timer/Counter Interrupt Mask Register
         pub const TIMSK1 = @intToPtr(*volatile Mmio(8, packed struct {
@@ -465,7 +459,6 @@ pub const registers = struct {
 
     /// Timer/Counter, 8-bit Async
     pub const TC2 = struct {
-
         /// address: 0x70
         /// Timer/Counter Interrupt Mask register
         pub const TIMSK2 = @intToPtr(*volatile Mmio(8, packed struct {
@@ -585,7 +578,6 @@ pub const registers = struct {
 
     /// Analog-to-Digital Converter
     pub const ADC = struct {
-
         /// address: 0x7c
         /// The ADC multiplexer Selection Register
         pub const ADMUX = @intToPtr(*volatile Mmio(8, packed struct {
@@ -682,7 +674,6 @@ pub const registers = struct {
 
     /// Analog Comparator
     pub const AC = struct {
-
         /// address: 0x50
         /// Analog Comparator Control And Status Register
         pub const ACSR = @intToPtr(*volatile Mmio(8, packed struct {
@@ -725,7 +716,6 @@ pub const registers = struct {
 
     /// I/O Port
     pub const PORTB = struct {
-
         /// address: 0x25
         /// Port B Data Register
         pub const PORTB = @intToPtr(*volatile u8, 0x25);
@@ -741,7 +731,6 @@ pub const registers = struct {
 
     /// I/O Port
     pub const PORTC = struct {
-
         /// address: 0x28
         /// Port C Data Register
         pub const PORTC = @intToPtr(*volatile u7, 0x28);
@@ -757,7 +746,6 @@ pub const registers = struct {
 
     /// I/O Port
     pub const PORTD = struct {
-
         /// address: 0x2b
         /// Port D Data Register
         pub const PORTD = @intToPtr(*volatile u8, 0x2b);
@@ -773,7 +761,6 @@ pub const registers = struct {
 
     /// Timer/Counter, 8-bit
     pub const TC0 = struct {
-
         /// address: 0x48
         /// Timer/Counter0 Output Compare Register
         pub const OCR0B = @intToPtr(*volatile u8, 0x48);
@@ -872,7 +859,6 @@ pub const registers = struct {
 
     /// External Interrupts
     pub const EXINT = struct {
-
         /// address: 0x69
         /// External Interrupt Control Register
         pub const EICRA = @intToPtr(*volatile Mmio(8, packed struct {
@@ -971,7 +957,6 @@ pub const registers = struct {
 
     /// Serial Peripheral Interface
     pub const SPI = struct {
-
         /// address: 0x4e
         /// SPI Data Register
         pub const SPDR = @intToPtr(*volatile u8, 0x4e);
@@ -1019,7 +1004,6 @@ pub const registers = struct {
 
     /// Watchdog Timer
     pub const WDT = struct {
-
         /// address: 0x60
         /// Watchdog Timer Control Register
         pub const WDTCSR = @intToPtr(*volatile Mmio(8, packed struct {
@@ -1040,7 +1024,6 @@ pub const registers = struct {
 
     /// CPU Registers
     pub const CPU = struct {
-
         /// address: 0x64
         /// Power Reduction Register
         pub const PRR = @intToPtr(*volatile Mmio(8, packed struct {
@@ -1202,7 +1185,6 @@ pub const registers = struct {
 
     /// EEPROM
     pub const EEPROM = struct {
-
         /// address: 0x41
         /// EEPROM Address Register Bytes
         pub const EEAR = @intToPtr(*volatile u10, 0x41);
@@ -1312,7 +1294,7 @@ pub fn mmioInt(addr: usize, comptime size: usize, comptime T: type) *volatile Mm
     return @intToPtr(*volatile MmioInt(size, T), addr);
 }
 
-const InterruptVector = extern union {
+pub const InterruptVector = extern union {
     C: fn () callconv(.C) void,
     Naked: fn () callconv(.Naked) void,
     // Interrupt is not supported on arm

src/modules/chips/lpc1768/registers.zig

@@ -647,7 +647,7 @@ pub const registers = struct {
             /// characters must be written before an interrupt or DMA request is activated.
             RXTRIGLVL: u2,
             /// Reserved. Read value is undefined, only zero should be written.
-           RESERVED0: u8,
+            RESERVED0: u8,
             RESERVED1: u16,
         }), base_address + 0x8);
 
@@ -8703,7 +8703,7 @@ pub const registers = struct {
             PLLC0: u1,
             /// Reserved, user software should not write ones to reserved bits. The value read
             /// from a reserved bit is not defined.
-            RESERVED: u30=0,
+            RESERVED: u30 = 0,
         }), base_address + 0x80);
 
         /// address: 0x400fc084
@@ -9036,7 +9036,7 @@ pub const registers = struct {
             CLKSRC: u2,
             /// Reserved, user software should not write ones to reserved bits. The value read
             /// from a reserved bit is not defined.
-            RESERVED: u30=0,
+            RESERVED: u30 = 0,
         }), base_address + 0x10c);
 
         /// address: 0x400fc110
@@ -9238,7 +9238,7 @@ pub const registers = struct {
             /// Peripheral clock selection for I2C1.
             PCLK_I2C1: u2,
             /// Reserved.
-            RESERVED0: u2=1,
+            RESERVED0: u2 = 1,
             /// Peripheral clock selection for SSP0.
             PCLK_SSP0: u2,
             /// Peripheral clock selection for TIMER2.
@@ -9254,7 +9254,7 @@ pub const registers = struct {
             /// Peripheral clock selection for I2S.
             PCLK_I2S: u2,
             /// Reserved.
-            RESERVED1: u2=1,
+            RESERVED1: u2 = 1,
             /// Peripheral clock selection for Repetitive Interrupt Timer.
             PCLK_RIT: u2,
             /// Peripheral clock selection for the System Control block.
@@ -18796,7 +18796,7 @@ pub fn mmioInt(addr: usize, comptime size: usize, comptime T: type) *volatile Mm
     return @intToPtr(*volatile MmioInt(size, T), addr);
 }
 
-const InterruptVector = extern union {
+pub const InterruptVector = extern union {
     C: fn () callconv(.C) void,
     Naked: fn () callconv(.Naked) void,
     // Interrupt is not supported on arm