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commit 1bbc7be
Author: pokemium <bluejapan73+dev@gmail.com>
Date:   Sun Apr 25 06:38:14 2021 +0900

    dma ok

commit 2ead097
Author: pokemium <bluejapan73+dev@gmail.com>
Date:   Sun Apr 25 06:20:12 2021 +0900

    fix

commit 46c453f
Author: pokemium <bluejapan73+dev@gmail.com>
Date:   Sun Apr 25 06:06:32 2021 +0900

    fix

commit abe5543
Author: pokemium <bluejapan73+dev@gmail.com>
Date:   Sun Apr 25 06:02:49 2021 +0900

    refactor

commit c9ba65a
Author: pokemium <bluejapan73+dev@gmail.com>
Date:   Sun Apr 25 05:29:04 2021 +0900

    refactor
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@akatsuki105
akatsuki105 committed Apr 24, 2021
1 parent 16ed318 commit 1d7a53b
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Showing 19 changed files with 191 additions and 435 deletions.
12 changes: 4 additions & 8 deletions pkg/gba/apu.go
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Original file line number Diff line number Diff line change
Expand Up @@ -214,13 +214,9 @@ func (g *GBA) squareSample(ch int) int8 {
}

func (g *GBA) enableSoundChan(ch int, enable bool) {
cntx := byte(g._getRAM(ram.SOUNDCNT_X))
if enable {
cntx = cntx | (1 << ch)
} else {
cntx = cntx & ^(1 << ch)
}
g.RAM.IO[ram.IOOffset(ram.SOUNDCNT_X)] = cntx
cntx := g._getRAM(ram.SOUNDCNT_X)
cntx = util.SetBit32(cntx, ch, enable)
g.RAM.IO[ram.IOOffset(ram.SOUNDCNT_X)] = byte(cntx)
}

func (g *GBA) isSoundMasterEnable() bool {
Expand Down Expand Up @@ -503,7 +499,7 @@ func (g *GBA) soundClock(cycles uint32) {
cnth := uint16(g._getRAM(ram.SOUNDCNT_H)) // snd_pcm_vol
volADiv, volBDiv := int16((cnth>>2)&0b1), int16((cnth>>3)&0b1)
sampCh4, sampCh5 := fifoASamp>>volADiv, fifoBSamp>>volBDiv
sampCh4, sampCh5 = 0, 0
// sampCh4, sampCh5 = 0, 0

// Left
if util.Bit(cnth, 9) {
Expand Down
4 changes: 2 additions & 2 deletions pkg/gba/arm.go
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Original file line number Diff line number Diff line change
Expand Up @@ -985,7 +985,7 @@ func (g *GBA) armMRS(inst uint32) {
rd := (inst >> 12) & 0b1111
if useSpsr := util.Bit(inst, 22); useSpsr {
mode := g.getOSMode()
g.R[rd] = g.SPSRBank[bankIdx(mode)]
g.R[rd] = g.SPSRBank[bankIdx[mode]]
return
}

Expand Down Expand Up @@ -1035,7 +1035,7 @@ func (g *GBA) armMSR(inst uint32) {
psr &= mask

if r {
spsr := g.SPSRBank[bankIdx(g.getOSMode())]
spsr := g.SPSRBank[bankIdx[g.getOSMode()]]
g.setSPSR((spsr & ^mask) | psr)
} else {
currMode := g.getOSMode()
Expand Down
37 changes: 4 additions & 33 deletions pkg/gba/cond.go
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Original file line number Diff line number Diff line change
Expand Up @@ -23,40 +23,11 @@ const (
NV
)

var cond2str = map[Cond]string{EQ: "eq", NE: "ne", CS: "cs", CC: "cc", MI: "mi", PL: "pl", VS: "vs", VC: "vc", HI: "hi", LS: "ls", GE: "ge", LT: "lt", GT: "gt", LE: "le", AL: "al", NV: "nv"}

func (c Cond) String() string {
switch c {
case EQ:
return "eq"
case NE:
return "ne"
case CS:
return "cs"
case CC:
return "cc"
case MI:
return "mi"
case PL:
return "pl"
case VS:
return "vs"
case VC:
return "vc"
case HI:
return "hi"
case LS:
return "ls"
case GE:
return "ge"
case LT:
return "lt"
case GT:
return "gt"
case LE:
return "le"
case AL:
return "al"
case NV:
return "nv"
if s, ok := cond2str[c]; ok {
return s
}
return "unk"
}
Expand Down
36 changes: 2 additions & 34 deletions pkg/gba/debug.go
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Original file line number Diff line number Diff line change
Expand Up @@ -282,41 +282,9 @@ func (g *GBA) PrintHistory() {
}
}

func (i IRQID) String() string {
irq := ""
switch i {
case irqVBlank:
irq = "Vblank"
case irqHBlank:
irq = "Hblank"
case irqVCount:
irq = "VCount"
case irqTimer0:
irq = "Timer0"
case irqTimer1:
irq = "Timer1"
case irqTimer2:
irq = "Timer2"
case irqTimer3:
irq = "Timer3"
case irqSerial:
irq = "Serial"
case irqDMA0:
irq = "DMA0"
case irqDMA1:
irq = "DMA1"
case irqDMA2:
irq = "DMA2"
case irqDMA3:
irq = "DMA3"
case irqKEY:
irq = "KEY"
case irqGamePak:
irq = "GamePak"
}
var irq2str = map[IRQID]string{irqVBlank: "Vblank", irqHBlank: "Hblank", irqVCount: "VCount", irqTimer0: "Timer0", irqTimer1: "Timer1", irqTimer2: "Timer2", irqTimer3: "Timer3", irqSerial: "Serial", irqDMA0: "DMA0", irqDMA1: "DMA1", irqDMA2: "DMA2", irqDMA3: "DMA3", irqKEY: "KEY", irqGamePak: "GamePak"}

return irq
}
func (i IRQID) String() string { return irq2str[i] }

func (ih IRQHistory) String() string {
mode := "ARM"
Expand Down
39 changes: 3 additions & 36 deletions pkg/gba/debug_decode.go
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Original file line number Diff line number Diff line change
Expand Up @@ -236,43 +236,10 @@ func armDecodeMPY(inst uint32) string {
}
}

func armDecodeALU(inst uint32) string {
opcode := ""
switch inst >> 21 & 0b1111 {
case 0x0:
opcode = "and"
case 0x1:
opcode = "eor"
case 0x2:
opcode = "sub"
case 0x3:
opcode = "rsb"
case 0x4:
opcode = "add"
case 0x5:
opcode = "adc"
case 0x6:
opcode = "sbc"
case 0x7:
opcode = "rsc"
case 0x8:
opcode = "tst"
case 0x9:
opcode = "teq"
case 0xa:
opcode = "cmp"
case 0xb:
opcode = "cmn"
case 0xc:
opcode = "orr"
case 0xd:
opcode = "mov"
case 0xe:
opcode = "bic"
case 0xf:
opcode = "mvn"
}
var aluOp2str = map[uint32]string{0x0: "and", 0x1: "eor", 0x2: "sub", 0x3: "rsb", 0x4: "add", 0x5: "adc", 0x6: "sbc", 0x7: "rsc", 0x8: "tst", 0x9: "teq", 0xa: "cmp", 0xb: "cmn", 0xc: "orr", 0xd: "mov", 0xe: "bic", 0xf: "mvn"}

func armDecodeALU(inst uint32) string {
opcode := aluOp2str[inst>>21&0b1111]
rd := inst >> 12 & 0b1111
rn := (inst >> 16) & 0b1111
op2 := ""
Expand Down
60 changes: 32 additions & 28 deletions pkg/gba/dma.go
View file
Original file line number Diff line number Diff line change
Expand Up @@ -14,16 +14,12 @@ const (
)

type DMA struct {
io [12]byte
io [12]byte
src, dst uint32
}

func NewDMA() [4]*DMA { return [4]*DMA{&DMA{}, &DMA{}, &DMA{}, &DMA{}} }
func (ch *DMA) src() uint32 { return util.LE32(ch.io[:]) }
func (ch *DMA) dst() uint32 { return util.LE32(ch.io[4:]) }
func (ch *DMA) cnt() uint32 { return util.LE32(ch.io[8:]) }
func (ch *DMA) setSrc(v uint32) {
ch.io[0], ch.io[1], ch.io[2], ch.io[3] = byte(v), byte(v>>8), byte(v>>16), byte(v>>24)
}
func (ch *DMA) setCnt(v uint32) {
ch.io[8], ch.io[9], ch.io[10], ch.io[11] = byte(v), byte(v>>8), byte(v>>16), byte(v>>24)
}
Expand All @@ -32,30 +28,38 @@ func isDMA1IO(addr uint32) bool { return 0x0400_00BC <= addr && addr <= 0x0400_0
func isDMA2IO(addr uint32) bool { return 0x0400_00C8 <= addr && addr <= 0x0400_00D3 }
func isDMA3IO(addr uint32) bool { return 0x0400_00D4 <= addr && addr <= 0x0400_00DF }

func (ch *DMA) get(ofs uint32) uint32 {
return util.LE32(ch.io[ofs:])
}
func (ch *DMA) get(ofs uint32) uint32 { return util.LE32(ch.io[ofs:]) }
func (ch *DMA) set(ofs uint32, b byte) bool {
old := byte(ch.cnt() >> 24)
ch.io[ofs] = b
if ofs == 11 {
ch.src, ch.dst = util.LE32(ch.io[0:]), util.LE32(ch.io[4:])
switch ch.size() {
case 32:
ch.src &= ^uint32(3)
ch.dst &= ^uint32(3)
case 16:
ch.src &= ^uint32(1)
ch.dst &= ^uint32(1)
}
return !util.Bit(old, 7) && util.Bit(b, 7) && (ch.timing() == 0)
}
return false
}

func (ch *DMA) dstCnt() (int64, bool) {
func (ch *DMA) dstCnt() int64 {
switch (ch.cnt() >> (16 + 5)) & 0b11 {
case 0:
return int64(ch.size()) / 8, false
return int64(ch.size()) / 8
case 1:
return -int64(ch.size()) / 8, false
return -int64(ch.size()) / 8
case 3:
return int64(ch.size()) / 8, true
return int64(ch.size()) / 8
default:
return 0, false
return 0
}
}
func (ch *DMA) dstReload() bool { return (ch.cnt()>>(16+5))&0b11 == 3 }
func (ch *DMA) srcCnt() int64 {
switch (ch.cnt() >> (16 + 7)) & 0b11 {
case 0:
Expand All @@ -76,9 +80,7 @@ func (ch *DMA) size() int {
func (ch *DMA) timing() dmaTiming { return dmaTiming((ch.cnt() >> (16 + 12)) & 0b11) }
func (ch *DMA) irq() bool { return util.Bit(ch.cnt(), 16+14) }
func (ch *DMA) enabled() bool { return util.Bit(ch.cnt(), 16+15) }
func (ch *DMA) disable() {
ch.setCnt(ch.cnt() & 0x7fff_ffff)
}
func (ch *DMA) disable() { ch.setCnt(ch.cnt() & 0x7fff_ffff) }
func (ch *DMA) wordCount(i int) int {
wordCount := ch.cnt() & 0xffff
if wordCount == 0 {
Expand All @@ -99,18 +101,16 @@ func (g *GBA) dmaTransfer(t dmaTiming) {
g.timer(2)

wc, size := ch.wordCount(i), ch.size()
src, dst := ch.src(), ch.dst()
srcInc := ch.srcCnt()
dstInc, _ := ch.dstCnt()
srcInc, dstInc := ch.srcCnt(), ch.dstCnt()
for wc > 0 {
switch size {
case 16:
g.setRAM16(dst, g.getRAM16(src, true), true)
g.setRAM16(ch.dst, g.getRAM16(ch.src, true), true)
case 32:
g.setRAM32(dst, g.getRAM32(src, true), true)
g.setRAM32(ch.dst, g.getRAM32(ch.src, true), true)
}

dst, src = uint32(int64(dst)+dstInc), uint32(int64(src)+srcInc)
ch.dst, ch.src = uint32(int64(ch.dst)+dstInc), uint32(int64(ch.src)+srcInc)
wc--
}

Expand All @@ -121,6 +121,10 @@ func (g *GBA) dmaTransfer(t dmaTiming) {
if !ch.repeat() {
ch.disable()
}

if ch.dstReload() {
ch.dst = util.LE32(ch.io[4:])
}
}
}

Expand All @@ -131,10 +135,10 @@ func (g *GBA) dmaTransferFifo(ch int) {
}

// 32bit × 4 = 4 words
src, dst, cnt := g.dma[ch].src(), g.dma[ch].dst(), g.dma[ch].cnt()
cnt := g.dma[ch].cnt()
for i := 0; i < 4; i++ {
val := g.getRAM32(src, true)
g.setRAM32(dst, val, true)
val := g.getRAM32(g.dma[ch].src, true)
g.setRAM32(g.dma[ch].dst, val, true)

if ch == 1 {
g.fifoACopy(val)
Expand All @@ -144,9 +148,9 @@ func (g *GBA) dmaTransferFifo(ch int) {

switch (cnt >> (16 + 7)) & 0b11 {
case 0:
src += 4
g.dma[ch].src += 4
case 1:
src -= 4
g.dma[ch].src -= 4
}
}

Expand Down
8 changes: 4 additions & 4 deletions pkg/gba/io.go
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@ func (g *GBA) _getRAM(addr uint32) uint32 {
switch {
case gpu.IsIO(addr):
return util.LE32(g.GPU.IO[(addr - 0x0400_0000):])
case isWaveRAM(addr):
case g.in(addr, ram.WAVE_RAM, ram.WAVE_RAM+0xf):
bank := (g._getRAM(ram.SOUND3CNT_L) >> 2) & 0x10
idx := (bank ^ 0x10) | (addr & 0xf)
return util.LE32(waveRAM[idx:])
Expand Down Expand Up @@ -92,8 +92,8 @@ func (g *GBA) _setRAM(addr uint32, val uint32, width int) {
if util.Bit(byte(g._getRAM(ram.SOUNDCNT_X)), 7) {
for i := uint32(0); i < uint32(width); i++ {
g.RAM.Set8(addr+i, byte(val>>(8*i)))
if isResetSoundChan(addr) {
g.resetSoundChan(addr, byte(val>>(8*i)))
if isResetSoundChan(addr + i) {
g.resetSoundChan(addr+i, byte(val>>(8*i)))
}
}
}
Expand All @@ -118,7 +118,7 @@ func (g *GBA) _setRAM(addr uint32, val uint32, width int) {
g.RAM.IO[ram.IOOffset(i)] = 0
}
}
case isWaveRAM(addr):
case g.in(addr, ram.WAVE_RAM, ram.WAVE_RAM+0xf): // wave ram
for i := uint32(0); i < uint32(width); i++ {
bank := (g._getRAM(ram.SOUND3CNT_L) >> 2) & 0x10
idx := (bank ^ 0x10) | (addr & 0xf)
Expand Down
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