This repository contains codes of Verilog which is a Hardware Definition Language. These code can be easily compiled and simulate with a software called ModelSim.
-
Notifications
You must be signed in to change notification settings - Fork 2
akifislam/Simulation-on-ModelSim-with-Verilog-HDL
Folders and files
Name | Name | Last commit message | Last commit date | |
---|---|---|---|---|
Repository files navigation
About
This repository contains codes of Verilog which is a Hardware Definition Language. These code can be easily compiled and simulate with a software called ModelSim.
Topics
Resources
Stars
Watchers
Forks
Releases
No releases published
Packages 0
No packages published