FPGA Calculator

Description

This project implements a simple calculator using FPGA (Field-Programmable Gate Array) technology. The design is implemented using Verilog HDL and is intended to be synthesized on an FPGA board. The calculator supports basic arithmetic operations such as addition, subtraction, multiplication, and division.

Features

• Basic arithmetic operations: addition, subtraction, multiplication, and division.
• Modular design with clear and organized code structure.
• Written in Verilog HDL.
• Synthesizable on various FPGA boards.

Project Structure

• calculator.srcs/: Contains the source files for the calculator, including Verilog HDL code and testbenches.

Getting Started

Prerequisites

• An FPGA development board (e.g., Xilinx, Altera).
• FPGA development tools (e.g., Xilinx Vivado, Altera Quartus).

Building the Project

1. Clone the repository:

   git clone https://github.com/yourusername/FPGA-calculator.git

2. Open the project in your preferred FPGA development environment.
3. Synthesize the design and program it to your FPGA board.
4. Test the calculator functionality on the FPGA board.