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Return correct peripheral clock rate for MAX32657 SPI
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MAX32657 SPI input clock rate should be APB clock divided by two.

Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
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ttmut committed Dec 12, 2024
1 parent cd9e926 commit 80f678c
Showing 1 changed file with 2 additions and 33 deletions.
35 changes: 2 additions & 33 deletions Libraries/PeriphDrivers/Source/SPI/spi_me30.c
Original file line number Diff line number Diff line change
Expand Up @@ -136,40 +136,9 @@ int MXC_SPI_ReadyForSleep(mxc_spi_regs_t *spi)

int MXC_SPI_GetPeripheralClock(mxc_spi_regs_t *spi)
{
int retval;

// TODO(ME30): Validate this logic
int sys_clk = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL) >>
MXC_F_GCR_CLKCTRL_SYSCLK_SEL_POS;
switch (sys_clk) {
case MXC_SYS_CLOCK_IPO:
retval = IPO_FREQ;
break;
case MXC_SYS_CLOCK_IBRO:
retval = IBRO_FREQ;
break;
case MXC_SYS_CLOCK_INRO:
retval = INRO_FREQ;
break;
case MXC_SYS_CLOCK_ERTCO:
retval = ERTCO_FREQ;
break;
// TODO(ME30): EXTCLK definition is missing from registers
// case MXC_SYS_CLOCK_EXTCLK:
// retval = EXTCLK_FREQ;
// break;
#if TARGET_NUM == 32655 || TARGET_NUM == 32680
case MXC_SYS_CLOCK_ERFO:
retval = ERFO_FREQ;
break;
#endif
default:
return E_BAD_STATE;
}

retval /= 2;
(void)spi;

return retval;
return PeripheralClock / 2;
}

int MXC_SPI_SetFrequency(mxc_spi_regs_t *spi, unsigned int hz)
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