Adjust GitHub Action and fix broken release

aw · Jan 10, 2023 · 4c0bb52 · 4c0bb52
1 parent 0e84ac6
commit 4c0bb52
Show file tree

Hide file tree

Showing 8 changed files with 31 additions and 16 deletions.
diff --git a/.github/workflows/main.yml b/.github/workflows/main.yml
@@ -22,10 +22,13 @@ jobs:
       - name: Build the FiveForths firmware binary for ${{matrix.device}}
         run: make ${{matrix.device}}
 
-      - name: Obtain SHA256 hash of the firmware ${{matrix.device}}.bin
-        run: sha256sum fiveforths.bin > fiveforths.bin.sha256
+      - name: Rename firmware binary file
+        run: mv fiveforths.bin fiveforths-${{matrix.device}}.bin
+
+      - name: Obtain SHA256 hash of the firmware
+        run: sha256sum fiveforths-${{matrix.device}}.bin > fiveforths-${{matrix.device}}.bin.sha256
 
       - uses: actions/upload-artifact@v3
         with:
           name: fiveforths-firmware-${{matrix.device}}
-          path: fiveforths.bin*
+          path: fiveforths-${{matrix.device}}.bin*
diff --git a/LICENSE b/LICENSE
@@ -1,6 +1,6 @@
 The MIT License (MIT)
 
-Copyright (c) 2021 Alexander Williams, On-Prem <license@on-premises.com>
+Copyright (c) 2021~ Alexander Williams, https://a1w.ca
 
 Permission is hereby granted, free of charge, to any person obtaining a copy of
 this software and associated documentation files (the "Software"), to deal in

diff --git a/Makefile b/Makefile
@@ -3,6 +3,8 @@
 # Makefile for building and testing
 
 PROGNAME = fiveforths
+FIRMWARE ?= $(PROGNAME).bin
+DEVICE ?= /dev/ttyUSB0
 CFLAGS := -g
 CROSS ?= /usr/bin/riscv64-unknown-elf-
 AS := $(CROSS)as
@@ -48,6 +50,9 @@ openocd:
 debug:
 		/opt/riscv/bin/riscv64-unknown-elf-gdb -command=debug.gdb -q fiveforths.elf
 
+flash:
+		stm32loader -p $(DEVICE) -ewv $(FIRMWARE)
+
 longan-nano:
 		$(MAKE) build BOARD=longan-nano
 

diff --git a/README.md b/README.md
@@ -1,4 +1,4 @@
-# 32-bit RISC-V Forth for microcontrollers
+# FiveForths: 32-bit RISC-V Forth for microcontrollers
 
 [![GitHub release](https://img.shields.io/github/release/aw/fiveforths.svg)](https://github.com/aw/fiveforths)
 
@@ -139,6 +139,7 @@ Please create a pull-request or [open an issue](https://github.com/aw/picolisp-k
   * Fix issue #9 - Handling of carriage return
   * Fix issue #11 - Ignore non-printable characters
   * Re-organize code to support different boards and MCUs
+  * Add boot message when the device is reset
   * Add GitHub action to automatically build and publish the firmware binaries
 
 ## 0.1 2023-01-09 - First release
@@ -160,4 +161,4 @@ This document would be incomplete without listing other Forths which inspired me
 
 [MIT License](LICENSE)
 
-Copyright (c) 2021~ Alexander Williams, On-Prem <license@on-premises.com>
+Copyright (c) 2021~ [Alexander Williams](https://a1w.ca)
diff --git a/fiveforths.s b/fiveforths.s
@@ -3,7 +3,7 @@ FiveForths - https://github.com/aw/FiveForths
 RISC-V Forth implementation
 
 The MIT License (MIT)
-Copyright (c) 2021 Alexander Williams, On-Prem <license@on-premises.com>
+Copyright (c) 2021~ Alexander Williams, https://a1w.ca
 */
 
 ##
@@ -19,6 +19,12 @@ Copyright (c) 2021 Alexander Williams, On-Prem <license@on-premises.com>
 # s1 = IP  = instruction pointer
 # s2 = RSP = return stack pointer
 
+# Ensure the _start entry label is defined first
+.text
+.global _start
+_start:
+    j boot
+
 # include board-specific functions and constants from src/boards/<board>/
 .include "board.s"
 

diff --git a/src/01-variables-constants.s b/src/01-variables-constants.s
@@ -2,7 +2,7 @@
 # Variables and constants
 ##
 
-.equ FORTH_VERSION, 1
+.equ FORTH_VERSION, 2
 
 ##
 # Memory map

diff --git a/src/03-interrupts.s b/src/03-interrupts.s
@@ -2,11 +2,6 @@
 # Interrupts
 ##
 
-.text
-.global _start
-_start:
-    j boot
-
 .balign CELL
 .global interrupt_handler
 .type interrupt_handler, @function

diff --git a/src/06-initialization.s b/src/06-initialization.s
@@ -2,9 +2,6 @@
 # Initialization
 ##
 
-.text
-.global _start
-
 # board boot initializations
 boot:
     call interrupt_init # RISC-V interrupt CSR initialization
@@ -21,6 +18,12 @@ boot:
     li t1, LATEST       # load LATEST variable
     sw t0, 0(t1)        # initialize LATEST variable to contain word_SEMI memory address
 
+    # display boot message
+    la a1, msg_boot     # load string message
+    addi a2, a1, 74     # load string length
+    call uart_print     # call uart print function
+    j reset
+
 # reset the Forth stack pointers, registers, variables, and state
 reset:
     # initialize stack pointers
@@ -53,3 +56,5 @@ tib_zerofill:
     j tib_zerofill      # repeat
 tib_done:
     j interpreter_start # jump to the main interpreter REPL
+
+msg_boot: .ascii "FiveForths v0.2, Copyright (c) 2021~ Alexander Williams, https://a1w.ca \n\n"