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Add AMD PMC/U support
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lancelui-amzn committed Aug 5, 2024
1 parent 4b910d2 commit 35b9867
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3 changes: 3 additions & 0 deletions src/data.rs
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,9 @@ cfg_if::cfg_if! {
pub mod intel_perf_events;
pub mod intel_icelake_perf_events;
pub mod intel_sapphire_rapids_perf_events;
pub mod amd_perf_events;
pub mod amd_genoa_perf_events;
pub mod amd_milan_perf_events;
}
}
pub mod interrupts;
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24 changes: 24 additions & 0 deletions src/data/amd_genoa_perf_events.rs
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@@ -0,0 +1,24 @@
use crate::data::perf_stat::{NamedCtr, NamedTypeCtr, PerfType};

static STALL_BACKEND_PKC: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "Backend-Stalls",
config: 0x100001ea0,
};
static CYCLES: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "Cycles",
config: 0x0076,
};

lazy_static! {
pub static ref GENOA_CTRS: Vec<NamedCtr<'static>> = [
NamedCtr {
name: "stall_backend_pkc",
nrs: vec![STALL_BACKEND_PKC],
drs: vec![CYCLES],
scale: 167 //~= 1000/6
},
]
.to_vec();
}
35 changes: 35 additions & 0 deletions src/data/amd_milan_perf_events.rs
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@@ -0,0 +1,35 @@
use crate::data::perf_stat::{NamedCtr, NamedTypeCtr, PerfType};

static STALL_BACKEND_PKC1: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "Backend-Stalls-1",
config: 0xf7ae,
};
static STALL_BACKEND_PKC2: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "Backend-Stalls-2",
config: 0x27af,
};
static CYCLES: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "Cycles",
config: 0x0076,
};

lazy_static! {
pub static ref MILAN_CTRS: Vec<NamedCtr<'static>> = [
NamedCtr {
name: "stall_backend_pkc1",
nrs: vec![STALL_BACKEND_PKC1],
drs: vec![CYCLES],
scale: 1000
},
NamedCtr {
name: "stall_backend_pkc2",
nrs: vec![STALL_BACKEND_PKC2],
drs: vec![CYCLES],
scale: 1000
},
]
.to_vec();
}
135 changes: 135 additions & 0 deletions src/data/amd_perf_events.rs
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@@ -0,0 +1,135 @@
use crate::data::perf_stat::{NamedCtr, NamedTypeCtr, PerfType};

// amd events
static INSTRUCTIONS: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "Instructions",
config: 0x00c0,
};
static CYCLES: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "Cycles",
config: 0x0076,
};
static BRANCHES: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "Branches",
config: 0x00c3,
};
static L1_DATA: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "L1-Data",
config: 0xff44,
};
static L1_INSTRUCTIONS: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "L1-Instructions",
config: 0x1060,
};
static L2: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "L2",
config: 0x0964,
};
static L3: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "L3",
config: 0x0843,
};
static STALL_FRONTEND_PKC: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "Frontend-Stalls",
config: 0x00a9,
};
static INSTRUCTION_TLB: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "Instruction-TLB",
config: 0x0084,
};
static INSTRUCTION_TLB_TW: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "Instruction-TLB-TW",
config: 0x0f85,
};
static DATA_TLB: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "Data-TLB",
config: 0xff45,
};
static DATA_TLB_TW: NamedTypeCtr = NamedTypeCtr {
perf_type: PerfType::RAW,
name: "Data-TLB-TW",
config: 0xf045,
};

lazy_static! {
pub static ref PERF_LIST: Vec<NamedCtr<'static>> = [
NamedCtr {
name: "ipc",
nrs: vec![INSTRUCTIONS],
drs: vec![CYCLES],
scale: 1
},
NamedCtr {
name: "branch-mpki",
nrs: vec![BRANCHES],
drs: vec![INSTRUCTIONS],
scale: 1000
},
NamedCtr {
name: "data-l1-mpki",
nrs: vec![L1_DATA],
drs: vec![INSTRUCTIONS],
scale: 1000
},
NamedCtr {
name: "inst-l1-mpki",
nrs: vec![L1_INSTRUCTIONS],
drs: vec![INSTRUCTIONS],
scale: 1000
},
NamedCtr {
name: "l2-mpki",
nrs: vec![L2],
drs: vec![INSTRUCTIONS],
scale: 1000
},
NamedCtr {
name: "l3-mpki",
nrs: vec![L3],
drs: vec![INSTRUCTIONS],
scale: 1000
},
NamedCtr {
name: "stall_frontend_pkc",
nrs: vec![STALL_FRONTEND_PKC],
drs: vec![CYCLES],
scale: 1000
},
NamedCtr {
name: "inst-tlb-mpki",
nrs: vec![INSTRUCTION_TLB],
drs: vec![INSTRUCTIONS],
scale: 1000
},
NamedCtr {
name: "inst-tlb-tw-mpki",
nrs: vec![INSTRUCTION_TLB_TW],
drs: vec![INSTRUCTIONS],
scale: 1000
},
NamedCtr {
name: "data-tlb-mpki",
nrs: vec![DATA_TLB],
drs: vec![INSTRUCTIONS],
scale: 1000
},
NamedCtr {
name: "data-tlb-tw-pki",
nrs: vec![DATA_TLB_TW],
drs: vec![INSTRUCTIONS],
scale: 1000
},
]
.to_vec();
}
12 changes: 12 additions & 0 deletions src/data/perf_stat.rs
Original file line number Diff line number Diff line change
Expand Up @@ -19,6 +19,8 @@ use crate::data::grv_perf_events;
use {
crate::data::intel_icelake_perf_events::ICX_CTRS, crate::data::intel_perf_events,
crate::data::intel_sapphire_rapids_perf_events::SPR_CTRS, crate::data::utils::get_cpu_info,
crate::data::amd_genoa_perf_events::GENOA_CTRS, crate::data::amd_perf_events,
crate::data::amd_milan_perf_events::MILAN_CTRS,
indexmap::IndexMap,
};

Expand Down Expand Up @@ -140,6 +142,16 @@ impl CollectData for PerfStatRaw {
"Intel(R) Xeon(R) Platinum 8488C" => SPR_CTRS.to_vec(),
_ => Vec::new(),
};
} else if cpu_info.vendor == "AuthenticAMD" {
warn!("Event multiplexing may result in bad PMU data."); //TODO: mitigate bad PMU data on AMD instances
perf_list = amd_perf_events::PERF_LIST.to_vec();

/* Get Model specific events */
platform_specific_counter = match cpu_info.model_name.as_str() {
"AMD EPYC 9R14" => GENOA_CTRS.to_vec(),
"AMD EPYC 7R13 Processor" => MILAN_CTRS.to_vec(),
_ => Vec::new(),
};
} else {
return Err(PDError::CollectorPerfUnsupportedCPU.into());
}
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