This repository contains all the source files related to design and simulation of a Ring Oscillator and a Programmable Logic Device(PLD) using LTSpice XVIII simulator.
We were supposed to submit the following files for this assignment.
- A report
- Index numbers and group number as the cover page.
- 2nd page with contributions of each member
- Waveform, results, discussion (problems faced and how to overcome them , mathematical calculations if any)
- Simulation files indicating the question number
Circuit | Description |
---|---|
Circuit 1: Parasitic effect in Timing analysis (evaluated to 15 marks) | Design a 3 stage (3 inverters) ring oscillator. Find the correlation of the parasitic effect in the oscillation period. |
Circuit 2: PLD ( evaluated to 35 marks) | Part 1: Design a programable logic block to configure it as a 'NAND' or a 'NOR' gate using a single selection bit. (10 marks) Part 2: Design a single switch matrix using six pass transistors. (10 marks) Part 3: Design a PLD that can be used to design any 3 input combinational circuit. (15 marks) |
Submission link - https://dms.uom.lk/s/zHXCsnbNcmC72B6
- Plot formatting: Tools -> Control Panel -> Waveforms
- Other necessary features of the LTSpice is explained in the report itself.