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Feature: Add a new target for ARMv8-A #2022
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Feature: Add a new target for ARMv8-A #2022
marysaka
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marysaka:feature/cortexa-armv8-aach64
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This change breakwatch::addr to be 64-bit as this will be required for ARMv8 AArch64 support. This also change the layout of breakwatch to avoid extraneous padding in 64-bit and reduce the size of the reserved array to 64 bits. Signed-off-by: Mary Guillemard <mary@mary.zone>
Signed-off-by: Mary Guillemard <mary@mary.zone>
Signed-off-by: Mary Guillemard <mary@mary.zone>
Signed-off-by: Mary Guillemard <mary@mary.zone>
Allow to grab the last target created, will be used to map DC with CTI objects. Signed-off-by: Mary Guillemard <mary@mary.zone>
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This adds support for Arm Coresight CTI as defined in SoC-400 and Soc-600 TRMs (DDI0480E, 100806) Signed-off-by: Mary Guillemard <mary@mary.zone>
ARMv8-A being completely different than ARMv7-A even at the debug componenet level makes it quite tidious to integrate in cortexar.c. This adds a new target for ARMv8-A with the base probing wired up. Signed-off-by: Mary Guillemard <mary@mary.zone>
Also read the CPUID. Signed-off-by: Mary Guillemard <mary@mary.zone>
Signed-off-by: Mary Guillemard <mary@mary.zone>
Also implement DCC/ITR interaction. Signed-off-by: Mary Guillemard <mary@mary.zone>
Signed-off-by: Mary Guillemard <mary@mary.zone>
Signed-off-by: Mary Guillemard <mary@mary.zone>
Signed-off-by: Mary Guillemard <mary@mary.zone>
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dragonmux
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Enhancement
General project improvement
New Target
New debug target
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Dec 15, 2024
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Detailed description
As ARMv8-A changed entirely debug interactions, a new target was needed.
This implements a new basic target for ARMv8-A that only support AArch64 for now.
I tested all those changes with a Solitude AML-S905D3-CC on core 0 in u-boot (JTAG access can be enabled with
smc 0x82000040 2
)Things left as todo that will not be tackled by this PR:
Depends on #2017.
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