Lab6 UART 結束後 firmware 無法繼續執行指令 #166

Russ420 · 2023-12-05T14:48:33Z

Russ420
Dec 5, 2023

Problem description：
在執行完 UART 後，
firmware 無法回到 main.c
checkbits 也無法被更新。

testbench snippet:

        wait(checkbits == 16'hAB60);
        $display("\nUART Test started");
	send_data_2;
	wait(checkbits == 16'hAB61);
	$display("UART Test passed");

	wait(checkbits == 16'hAB60);
	$display("\nQS Test started");
	wait(checkbits == 16'd40);
	$display("Call function matmul() in User Project BRAM, return value passed, 0x%x", checkbits);
	wait(checkbits == 16'd893);
	$display("Call function matmul() in User Project BRAM, return value passed, 0x%x", checkbits);
	wait(checkbits == 16'd2541);
	$display("Call function matmul() in User Project BRAM, return value passed, 0x%x", checkbits);
	wait(checkbits == 16'd2669);
	$display("Call function matmul() in User Project BRAM, return value passed, 0x%x", checkbits);		
	wait(checkbits == 16'hAB61);
	$display("QS Test passed");

firmware snippet:

	// uart
	reg_mprj_datal = 0xAB600000;
    #ifdef USER_PROJ_IRQ0_EN	
	// unmask USER_IRQ_0_INTERRUPT
	mask = irq_getmask();
	mask |= 1 << USER_IRQ_0_INTERRUPT; // USER_IRQ_0_INTERRUPT = 2
	irq_setmask(mask);
	// enable user_irq_0_ev_enable
	user_irq_0_ev_enable_write(1);	
    #endif
	reg_mprj_datal = 0xAB610000;

	   // qs
	reg_mprj_datal = 0xAB600000;
	   tmp = qsort();
	reg_mprj_datal = *tmp << 16;
	reg_mprj_datal = *(tmp+1) << 16;
	reg_mprj_datal = *(tmp+2) << 16;
	reg_mprj_datal = *(tmp+3) << 16;
	reg_mprj_datal = *(tmp+4) << 16;
	reg_mprj_datal = *(tmp+5) << 16;
	reg_mprj_datal = *(tmp+6) << 16;
	reg_mprj_datal = *(tmp+7) << 16;
	reg_mprj_datal = *(tmp+8) << 16;
	reg_mprj_datal = *(tmp+9) << 16;	
	reg_mprj_datal = *tmp << 16;
	reg_mprj_datal = 0xAB610000;
}

result:

Answered by boledulab

Dec 7, 2023

few comments:

UART loop should be run in parallel with fir/matmul/qs.
In testbench, fork two processes: one is doing uart ：send_data_2 , another is doing fir/matmul/qs
in the task uart: send_data, we may wait random delay to send data. This is to let interrupt happen at any time when CPU execute fir/matmul/qs
In firmware code, enable irq as early as possible. so that we won't lose uart rx interrupt.
mask = irq_getmask();
mask |= 1 << USER_IRQ_0_INTERRUPT; // USER_IRQ_0_INTERRUPT = 2
irq_setmask(mask);
// enable user_irq_0_ev_enable
user_irq_0_ev_enable_write(1);
Try to use different mprj code (AB60, AB61) to indicate which part of code is running.
Note: since interrupt generated randomly…

View full answer

samlo123 · 2023-12-06T01:38:59Z

samlo123
Dec 6, 2023

如果firmware.c中單獨測試//qs的部分，如果也不行，有可能是firmware mprj0~31的設定有問題，可以檢查一下。

1 reply

Russ420 Dec 6, 2023
Author

我們可能沒有表達得足夠清楚，我們可以在 UART(ISR) 前面正常執行其他的程式。但是執行 UART 過後會無法執行其他的程式, e.g, qsort,etc。我們的假設是可能沒有正確的 context switch 導致無法執行剩餘的指令。

testbench snippet:

                $display("Test Started");
		
		wait(checkbits == 16'hAB60);
		$display("\nFIR Test started");
		wait(checkbits == 16'hAB61);
		$display("FIR Test passed");

		wait(checkbits == 16'hAB60);
		$display("\nMM Test started");
		wait(checkbits == 16'h003E);
		$display("Call function matmul() in User Project BRAM, return value passed, 0x%x", checkbits);
		wait(checkbits == 16'h0044);
		$display("Call function matmul() in User Project BRAM, return value passed, 0x%x", checkbits);
		wait(checkbits == 16'h004A);
		$display("Call function matmul() in User Project BRAM, return value passed, 0x%x", checkbits);
		wait(checkbits == 16'h0050);
		$display("Call function matmul() in User Project BRAM, return value passed, 0x%x", checkbits);		
		wait(checkbits == 16'hAB61);
		$display("MM Test passed");

		wait(checkbits == 16'hAB60);
		$display("\nQS Test started");
		wait(checkbits == 16'd40);
		$display("Call function matmul() in User Project BRAM, return value passed, 0x%x", checkbits);
		wait(checkbits == 16'd893);
		$display("Call function matmul() in User Project BRAM, return value passed, 0x%x", checkbits);
		wait(checkbits == 16'd2541);
		$display("Call function matmul() in User Project BRAM, return value passed, 0x%x", checkbits);
		wait(checkbits == 16'd2669);
		$display("Call function matmul() in User Project BRAM, return value passed, 0x%x", checkbits);		
		wait(checkbits == 16'hAB61);
		$display("QS Test passed");

		wait(checkbits == 16'hAB60);
		$display("\nUART Test started");
		send_data_2;
		wait(checkbits == 16'hAB61);
		$display("UART Test passed");
		//$display("how many qsort calls: %d", qsort_cnt);

		wait(checkbits == 16'hAB60);
		$display("\nQS Test started");
		wait(checkbits == 16'd40);
		$display("Call function matmul() in User Project BRAM, return value passed, 0x%x", checkbits);
		wait(checkbits == 16'd893);
		$display("Call function matmul() in User Project BRAM, return value passed, 0x%x", checkbits);
		wait(checkbits == 16'd2541);
		$display("Call function matmul() in User Project BRAM, return value passed, 0x%x", checkbits);
		wait(checkbits == 16'd2669);
		$display("Call function matmul() in User Project BRAM, return value passed, 0x%x", checkbits);		
		wait(checkbits == 16'hAB61);
		$display("QS Test passed");

firmware snippet:

        int* tmp;

	// fir
	tmp = fir();
	reg_mprj_datal = *tmp << 16;
	reg_mprj_datal = *(tmp+1) << 16;
	reg_mprj_datal = *(tmp+2) << 16;
	reg_mprj_datal = *(tmp+3) << 16;
	reg_mprj_datal = *(tmp+4) << 16;
	reg_mprj_datal = *(tmp+5) << 16;
	reg_mprj_datal = *(tmp+6) << 16;
	reg_mprj_datal = *(tmp+7) << 16;
	reg_mprj_datal = *(tmp+8) << 16;
	reg_mprj_datal = *(tmp+9) << 16;
	reg_mprj_datal = *(tmp+10) << 16;	

	reg_mprj_datal = 0xAB610000;
	
	   // mm
	reg_mprj_datal = 0xAB600000;
	   tmp = matmul();
	reg_mprj_datal = *tmp << 16;
	reg_mprj_datal = *(tmp+1) << 16;
	reg_mprj_datal = *(tmp+2) << 16;
	reg_mprj_datal = *(tmp+3) << 16;	
	reg_mprj_datal = *(tmp+9) << 16;

	   reg_mprj_datal = 0xAB610000;

	   // qs
	reg_mprj_datal = 0xAB600000;
	   tmp = qsort();
	reg_mprj_datal = *tmp << 16;
	reg_mprj_datal = *(tmp+1) << 16;
	reg_mprj_datal = *(tmp+2) << 16;
	reg_mprj_datal = *(tmp+3) << 16;
	reg_mprj_datal = *(tmp+4) << 16;
	reg_mprj_datal = *(tmp+5) << 16;
	reg_mprj_datal = *(tmp+6) << 16;
	reg_mprj_datal = *(tmp+7) << 16;
	reg_mprj_datal = *(tmp+8) << 16;
	reg_mprj_datal = *(tmp+9) << 16;	
	reg_mprj_datal = *tmp << 16;
	reg_mprj_datal = 0xAB610000;

	// uart
	reg_mprj_datal = 0xAB600000;
    #ifdef USER_PROJ_IRQ0_EN	
	// unmask USER_IRQ_0_INTERRUPT
	mask = irq_getmask();
	mask |= 1 << USER_IRQ_0_INTERRUPT; // USER_IRQ_0_INTERRUPT = 2
	irq_setmask(mask);
	// enable user_irq_0_ev_enable
	user_irq_0_ev_enable_write(1);	
    #endif

	reg_mprj_datal = 0xAB610000;

	   // qs
	reg_mprj_datal = 0xAB600000;
	   tmp = qsort();
	reg_mprj_datal = *tmp << 16;
	reg_mprj_datal = *(tmp+1) << 16;
	reg_mprj_datal = *(tmp+2) << 16;
	reg_mprj_datal = *(tmp+3) << 16;
	reg_mprj_datal = *(tmp+4) << 16;
	reg_mprj_datal = *(tmp+5) << 16;
	reg_mprj_datal = *(tmp+6) << 16;
	reg_mprj_datal = *(tmp+7) << 16;
	reg_mprj_datal = *(tmp+8) << 16;
	reg_mprj_datal = *(tmp+9) << 16;	
	reg_mprj_datal = *tmp << 16;
	reg_mprj_datal = 0xAB610000;

result:

ZGCiou · 2023-12-06T11:57:46Z

ZGCiou
Dec 6, 2023

firmware中uart的那段code是把cpu接收user project interrupt的功能打開
實際執行isr讓test bench收到data並print出那些資訊，是在tech bench執行send_data後user project中的uart接收完8 bit的data再發interrupt給cpu後
這中間應該是需要一段時間，我猜應該不是回不去而是firmware其實已經跑完了

2 replies

Russ420 Dec 6, 2023
Author

沒錯，樓上正解無誤。附上波型：

marker A: uart's ab60
marker B: uart's ab61
marker c: qsort's ab60
marker d: qsort's ab61
由於 testbench 中需要等到 send_data _2 結束才能開始等待 ab61 但是 send_data_2 需要等到 tbuart 的 tx_busy 結束後才會完成。導致我們的 testbench 中 uart 所接收到的 ab61 其實是 qsort 完成的 ab61。所以我們才會誤認 caravel 沒有進行 context switch。

但是我又有一個問題想要請問：由於 firmware 會呼叫 isr.c 而 isr.c 只需要賦予 state register值後即完成操作並送出 ab61。lab6 所定義的 isr 應該是需要完成整個 tbuart_tx -> usr_prj_uart_rx -> usr_prj_uart_tx -> tbuart_rx 的 loop-back 。我們是否應該要等待整個 loop-back完成過後才傳送 uart 的 ab61 呢?

ZGCiou Dec 6, 2023

isr.c並非由firmware所呼叫，而是cpu收到interrupt後被執行(可以參考crt0_vex.S開頭的部分)
所以firmware其實並不知道你這邊的"uart test's ab61"該什麼時候發
如果想要收到這個flag或許可以寫在isr.c或是uart.c的uart_write裡試試看
但也只能在把data送給user project的uart後發flag
user project uart什麼時候會把8 bit資料全部送完cpu並不知道
除非你要修改uart.v讓他送完資料再傳一個訊號給cpu

boledulab · 2023-12-07T00:28:43Z

boledulab
Dec 7, 2023
Maintainer

few comments:

UART loop should be run in parallel with fir/matmul/qs.
In testbench, fork two processes: one is doing uart ：send_data_2 , another is doing fir/matmul/qs
in the task uart: send_data, we may wait random delay to send data. This is to let interrupt happen at any time when CPU execute fir/matmul/qs
In firmware code, enable irq as early as possible. so that we won't lose uart rx interrupt.
mask = irq_getmask();
mask |= 1 << USER_IRQ_0_INTERRUPT; // USER_IRQ_0_INTERRUPT = 2
irq_setmask(mask);
// enable user_irq_0_ev_enable
user_irq_0_ev_enable_write(1);
Try to use different mprj code (AB60, AB61) to indicate which part of code is running.
Note: since interrupt generated randomly and concurrently with fir/matmul/qs, two tasks in fork-join runs concurrently too. Each monitor and track its mprj message concurrently.
We do not know the end of loop-back, we can use a special character, e.g. "\n" carriage return ASCII code 10. When isr receive a character "\n", it sends out a special mprj code to inform testbench.
When both uart (receiving mprj code), and fir/matmul/qs (receiving its corresponding mprj code), the testbench successfully finishes.

The above procedure avoids time for the testbench and firmware latency which is more robust.

1 reply

Russ420 Dec 7, 2023
Author

謝謝 @samlo123 @ZGCiou @boledulab 各位大大的回覆！

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Lab6 UART 結束後 firmware 無法繼續執行指令 #166

Russ420 Dec 5, 2023

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