Add support for RISC-V mcontext

bombela · Apr 26, 2021 · f5f329f · f5f329f
1 parent 51822c8
commit f5f329f
Showing 1 changed file with 2 additions and 0 deletions.
diff --git a/backward.hpp b/backward.hpp
@@ -4215,6 +4215,8 @@ class SignalHandling {
 #elif defined(__ppc__) || defined(__powerpc) || defined(__powerpc__) ||        \
     defined(__POWERPC__)
     error_addr = reinterpret_cast<void *>(uctx->uc_mcontext.regs->nip);
+#elif defined(__riscv)
+    error_addr = reinterpret_cast<void *>(uctx->uc_mcontext.__gregs[REG_PC]);
 #elif defined(__s390x__)
     error_addr = reinterpret_cast<void *>(uctx->uc_mcontext.psw.addr);
 #elif defined(__APPLE__) && defined(__x86_64__)