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cranelift/s390x: Use PRegs consistently (#8449)
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When OperandCollector's reg_use/reg_late_use/reg_def/reg_early_def
methods are handed a Reg that refers to a physical ("real") register,
they all delegate to reg_fixed_nonallocatable, ignoring the constraint
kinds and positions. This behavior was introduced in #5132.

In several cases, the s390x backend was calling those methods with the
result of the `gpr` or `writable_gpr` functions, which return physical
registers. In these cases we can now be more explicit that this is a
non-allocatable register.

In addition, this PR reverts #4973 and #5121 because they became
unecessary due, again, to #5132.
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@jameysharp
jameysharp authored Apr 23, 2024
1 parent 95ee0a2 commit 95fd37c
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Showing 2 changed files with 16 additions and 29 deletions.
38 changes: 14 additions & 24 deletions cranelift/codegen/src/isa/s390x/inst/mod.rs
View file
Original file line number Diff line number Diff line change
Expand Up @@ -403,7 +403,7 @@ fn memarg_operands<F: Fn(VReg) -> VReg>(memarg: &MemArg, collector: &mut Operand
}
// mem_finalize might require %r1 to hold (part of) the address.
// Conservatively assume this will always be necessary here.
collector.reg_early_def(writable_gpr(1));
collector.reg_fixed_nonallocatable(gpr_preg(1));
}

fn s390x_get_operands<F: Fn(VReg) -> VReg>(inst: &Inst, collector: &mut OperandCollector<'_, F>) {
Expand Down Expand Up @@ -486,9 +486,7 @@ fn s390x_get_operands<F: Fn(VReg) -> VReg>(inst: &Inst, collector: &mut OperandC
} => {
collector.reg_def(rd);
collector.reg_use(rn);
if shift_reg != zero_reg() {
collector.reg_use(shift_reg);
}
collector.reg_use(shift_reg);
}
&Inst::RxSBG { rd, ri, rn, .. } => {
collector.reg_reuse_def(rd, 1);
Expand Down Expand Up @@ -604,7 +602,7 @@ fn s390x_get_operands<F: Fn(VReg) -> VReg>(inst: &Inst, collector: &mut OperandC
let first_regnum = rt.to_reg().to_real_reg().unwrap().hw_enc();
let last_regnum = rt2.to_reg().to_real_reg().unwrap().hw_enc();
for regnum in first_regnum..last_regnum + 1 {
collector.reg_def(writable_gpr(regnum));
collector.reg_fixed_nonallocatable(gpr_preg(regnum));
}
}
&Inst::StoreMultiple64 {
Expand All @@ -614,15 +612,15 @@ fn s390x_get_operands<F: Fn(VReg) -> VReg>(inst: &Inst, collector: &mut OperandC
let first_regnum = rt.to_real_reg().unwrap().hw_enc();
let last_regnum = rt2.to_real_reg().unwrap().hw_enc();
for regnum in first_regnum..last_regnum + 1 {
collector.reg_use(gpr(regnum));
collector.reg_fixed_nonallocatable(gpr_preg(regnum));
}
}
&Inst::Mov64 { rd, rm } => {
collector.reg_def(rd);
collector.reg_use(rm);
}
&Inst::MovPReg { rd, rm } => {
debug_assert!([regs::gpr(0), regs::gpr(14), regs::gpr(15)].contains(&rm.into()));
&Inst::MovPReg { rd, ref rm } => {
debug_assert!([gpr_preg(0), gpr_preg(14), gpr_preg(15)].contains(rm));
debug_assert!(rd.to_reg().is_virtual());
collector.reg_def(rd);
}
Expand Down Expand Up @@ -689,7 +687,7 @@ fn s390x_get_operands<F: Fn(VReg) -> VReg>(inst: &Inst, collector: &mut OperandC
}
&Inst::LoadFpuConst32 { rd, .. } | &Inst::LoadFpuConst64 { rd, .. } => {
collector.reg_def(rd);
collector.reg_def(writable_gpr(1));
collector.reg_fixed_nonallocatable(gpr_preg(1));
}
&Inst::FpuRound { rd, rn, .. } => {
collector.reg_def(rd);
Expand All @@ -709,9 +707,7 @@ fn s390x_get_operands<F: Fn(VReg) -> VReg>(inst: &Inst, collector: &mut OperandC
} => {
collector.reg_def(rd);
collector.reg_use(rn);
if shift_reg != zero_reg() {
collector.reg_use(shift_reg);
}
collector.reg_use(shift_reg);
}
&Inst::VecSelect { rd, rn, rm, ra, .. } => {
collector.reg_def(rd);
Expand Down Expand Up @@ -833,7 +829,7 @@ fn s390x_get_operands<F: Fn(VReg) -> VReg>(inst: &Inst, collector: &mut OperandC
}
&Inst::VecLoadConst { rd, .. } | &Inst::VecLoadConstReplicate { rd, .. } => {
collector.reg_def(rd);
collector.reg_def(writable_gpr(1));
collector.reg_fixed_nonallocatable(gpr_preg(1));
}
&Inst::VecImmByteMask { rd, .. } => {
collector.reg_def(rd);
Expand Down Expand Up @@ -884,27 +880,21 @@ fn s390x_get_operands<F: Fn(VReg) -> VReg>(inst: &Inst, collector: &mut OperandC
collector.reg_reuse_def(rd, 1);
collector.reg_use(ri);
collector.reg_use(rn);
if lane_reg != zero_reg() {
collector.reg_use(lane_reg);
}
collector.reg_use(lane_reg);
}
&Inst::VecInsertLaneUndef {
rd, rn, lane_reg, ..
} => {
collector.reg_def(rd);
collector.reg_use(rn);
if lane_reg != zero_reg() {
collector.reg_use(lane_reg);
}
collector.reg_use(lane_reg);
}
&Inst::VecExtractLane {
rd, rn, lane_reg, ..
} => {
collector.reg_def(rd);
collector.reg_use(rn);
if lane_reg != zero_reg() {
collector.reg_use(lane_reg);
}
collector.reg_use(lane_reg);
}
&Inst::VecInsertLaneImm { rd, ri, .. } => {
collector.reg_reuse_def(rd, 1);
Expand Down Expand Up @@ -966,11 +956,11 @@ fn s390x_get_operands<F: Fn(VReg) -> VReg>(inst: &Inst, collector: &mut OperandC
&Inst::TrapIf { .. } => {}
&Inst::JTSequence { ridx, .. } => {
collector.reg_use(ridx);
collector.reg_early_def(writable_gpr(1));
collector.reg_fixed_nonallocatable(gpr_preg(1));
}
&Inst::LoadSymbolReloc { rd, .. } => {
collector.reg_def(rd);
collector.reg_def(writable_gpr(1));
collector.reg_fixed_nonallocatable(gpr_preg(1));
}
&Inst::LoadAddr { rd, ref mem } => {
collector.reg_def(rd);
Expand Down
7 changes: 2 additions & 5 deletions cranelift/codegen/src/isa/s390x/inst/regs.rs
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,6 @@
use alloc::string::String;
use regalloc2::PReg;
use regalloc2::VReg;

use crate::isa::s390x::inst::{RegPair, WritableRegPair};
use crate::machinst::*;
Expand All @@ -12,8 +11,7 @@ use crate::machinst::*;

/// Get a reference to a GPR (integer register).
pub fn gpr(num: u8) -> Reg {
let preg = gpr_preg(num);
Reg::from(VReg::new(preg.index(), RegClass::Int))
Reg::from(gpr_preg(num))
}

pub(crate) const fn gpr_preg(num: u8) -> PReg {
Expand All @@ -28,8 +26,7 @@ pub fn writable_gpr(num: u8) -> Writable<Reg> {

/// Get a reference to a VR (vector register).
pub fn vr(num: u8) -> Reg {
let preg = vr_preg(num);
Reg::from(VReg::new(preg.index(), RegClass::Float))
Reg::from(vr_preg(num))
}

pub(crate) const fn vr_preg(num: u8) -> PReg {
Expand Down

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