Add RET group to pop instructions which write to the PC.

capstone-engine · Dec 12, 2023 · 52c13fb · 52c13fb
1 parent 2fa9f60
commit 52c13fb
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Showing 2 changed files with 21 additions and 2 deletions.
diff --git a/arch/ARM/ARMMapping.c b/arch/ARM/ARMMapping.c
@@ -159,9 +159,28 @@ static void patch_cs_reg_alias(char *asm_str)
 	}
 }
 
+/// Check if PC is updated from stack. Those POP instructions
+/// are considered of group RETURN.
+static void check_pop_return(MCInst *MI) {
+	if (!MI->flat_insn->detail)
+		return;
+	if (MI->flat_insn->id != ARM_INS_POP && MI->flat_insn->alias_id != ARM_INS_ALIAS_POP) {
+		return;
+	}
+	for (size_t i = 0; i < ARM_get_detail(MI)->op_count; ++i) {
+		cs_arm_op *op = &ARM_get_detail(MI)->operands[i];
+		if (op->type == ARM_OP_REG && op->reg == ARM_REG_PC) {
+			add_group(MI, ARM_GRP_RET);
+		}
+	}
+}
+
 /// Adds group to the instruction which are not defined in LLVM.
 static void ARM_add_cs_groups(MCInst *MI)
 {
+	if (!MI->flat_insn->detail)
+		return;
+	check_pop_return(MI);
 	unsigned Opcode = MI->flat_insn->id;
 	switch (Opcode) {
 	default:

diff --git a/suite/cstest/issues.cs b/suite/cstest/issues.cs
@@ -749,7 +749,7 @@
 
 !# issue 760
 !# CS_ARCH_ARM, CS_MODE_ARM, CS_OPT_DETAIL
-0x0: 0x02,0x80,0xbd,0xe8 == pop {r1, pc} ; op_count: 2 ; operands[0].type: REG = r1 ; operands[0].access: WRITE ; operands[1].type: REG = r15 ; operands[1].access: WRITE ; Write-back: True ; Registers read: r13 ; Registers modified: r13 r1 r15 ; Groups: IsARM
+0x0: 0x02,0x80,0xbd,0xe8 == pop {r1, pc} ; op_count: 2 ; operands[0].type: REG = r1 ; operands[0].access: WRITE ; operands[1].type: REG = r15 ; operands[1].access: WRITE ; Write-back: True ; Registers read: r13 ; Registers modified: r13 r1 r15 ; Groups: IsARM return
 
 !# issue 750
 !# CS_ARCH_ARM, CS_MODE_ARM, CS_OPT_DETAIL
@@ -769,7 +769,7 @@
 
 !# issue 744
 !# CS_ARCH_ARM, CS_MODE_ARM, CS_OPT_DETAIL
-0x0: 0x02,0x80,0xbd,0xe8 == pop {r1, pc} ; op_count: 2 ; operands[0].type: REG = r1 ; operands[0].access: WRITE ; operands[1].type: REG = r15 ; operands[1].access: WRITE ; Write-back: True ; Registers read: r13 ; Registers modified: r13 r1 r15 ; Groups: IsARM
+0x0: 0x02,0x80,0xbd,0xe8 == pop {r1, pc} ; op_count: 2 ; operands[0].type: REG = r1 ; operands[0].access: WRITE ; operands[1].type: REG = r15 ; operands[1].access: WRITE ; Write-back: True ; Registers read: r13 ; Registers modified: r13 r1 r15 ; Groups: IsARM return
 
 !# issue 741
 !# CS_ARCH_X86, CS_MODE_32, None