Primt SME oeprands.

capstone-engine · Jun 21, 2023 · 5aeddb1 · 5aeddb1
1 parent a706ec7
commit 5aeddb1
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diff --git a/arch/AArch64/AArch64Mapping.c b/arch/AArch64/AArch64Mapping.c
@@ -234,6 +234,7 @@ static void set_sme_operand(MCInst *MI, bool init) {
 	assert(AArch64_get_detail_op(MI, 0)->sme.type != AArch64_SME_OP_INVALID);
 
 	AArch64_get_detail(MI)->is_doing_sme = true;
+	AArch64_get_detail_op(MI, 0)->type = AArch64_OP_SME_MATRIX;
 	AArch64_get_detail_op(MI, 0)->sme.type = AArch64_SME_OP_INVALID;
 	AArch64_get_detail_op(MI, 0)->sme.tile = AArch64_REG_INVALID;
 	AArch64_get_detail_op(MI, 0)->sme.slice_reg = AArch64_REG_INVALID;

diff --git a/cstool/cstool_aarch64.c b/cstool/cstool_aarch64.c
@@ -52,6 +52,19 @@ void print_insn_detail_aarch64(csh handle, cs_insn *ins)
 					printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp);
 
 				break;
+			case AArch64_OP_SME_MATRIX:
+				printf("\t\toperands[%u].type: SME_MATRIX\n", i);
+				printf("\t\toperands[%u].sme.type: %d\n", i, op->sme.type);
+
+				if (op->sme.tile != AArch64_REG_INVALID)
+					printf("\t\toperands[%u].sme.tile: %s\n", i, cs_reg_name(handle, op->sme.tile));
+				if (op->sme.slice_reg != AArch64_REG_INVALID)
+					printf("\t\toperands[%u].sme.slice_reg: %s\n", i, cs_reg_name(handle, op->sme.slice_reg));
+				if (op->sme.slice_offset != -1)
+					printf("\t\toperands[%u].sme.slice_offset: %d\n", i, op->sme.slice_offset);
+				if (op->sme.slice_reg != AArch64_REG_INVALID || op->sme.slice_offset != -1)
+					printf("\t\toperands[%u].sme.is_vertical: %s\n", i, (op->sme.is_vertical ? "true" : "false"));
+				break;
 			case AArch64_OP_CIMM:
 				printf("\t\toperands[%u].type: C-IMM = %u\n", i, (int)op->imm);
 				break;

diff --git a/include/capstone/aarch64.h b/include/capstone/aarch64.h
@@ -1853,6 +1853,7 @@ typedef enum aarch64_op_type {
 	AArch64_OP_BTI = CS_OP_SPECIAL + 16,
 	AArch64_OP_SVEPREDPAT = CS_OP_SPECIAL + 17,
 	AArch64_OP_SVEVECLENSPECIFIER = CS_OP_SPECIAL + 18,
+	AArch64_OP_SME_MATRIX = CS_OP_SPECIAL + 19,
 } aarch64_op_type;
 
 /// AArch64 registers