Rename ARM-64 -> AArch64

capstone-engine · Nov 2, 2023 · f5918ae · f5918ae
1 parent c47ddd6
commit f5918ae
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Showing 13 changed files with 27 additions and 27 deletions.
diff --git a/bindings/python/test_basic.py b/bindings/python/test_basic.py
@@ -58,7 +58,7 @@
         (CS_ARCH_MIPS, CS_MODE_MIPS64 + CS_MODE_LITTLE_ENDIAN, MIPS_CODE2, "MIPS-64-EL (Little-endian)", None),
         (CS_ARCH_MIPS, CS_MODE_MIPS32R6 + CS_MODE_MICRO + CS_MODE_BIG_ENDIAN, MIPS_32R6M, "MIPS-32R6 | Micro (Big-endian)", None),
         (CS_ARCH_MIPS, CS_MODE_MIPS32R6 + CS_MODE_BIG_ENDIAN, MIPS_32R6, "MIPS-32R6 (Big-endian)", None),
-        (CS_ARCH_AARCH64, CS_MODE_ARM, AARCH64_CODE, "ARM-64", None),
+        (CS_ARCH_AARCH64, CS_MODE_ARM, AARCH64_CODE, "AARCH64", None),
         (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, PPC_CODE, "PPC-64", None),
         (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, PPC_CODE, "PPC-64, print register with number only", CS_OPT_SYNTAX_NOREGNAME),
         (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN + CS_MODE_QPX, PPC_CODE2, "PPC-64 + QPX", None),

diff --git a/bindings/python/test_detail.py b/bindings/python/test_detail.py
@@ -42,7 +42,7 @@
         (CS_ARCH_ARM, CS_MODE_THUMB, THUMB_CODE2, "THUMB-2", None),
         (CS_ARCH_ARM, CS_MODE_THUMB + CS_MODE_MCLASS, THUMB_MCLASS, "Thumb-MClass", None),
         (CS_ARCH_ARM, CS_MODE_ARM + CS_MODE_V8, ARMV8, "Arm-V8", None),
-        (CS_ARCH_AARCH64, CS_MODE_ARM, AARCH64_CODE, "ARM-64", None),
+        (CS_ARCH_AARCH64, CS_MODE_ARM, AARCH64_CODE, "AARCH64", None),
         (CS_ARCH_MIPS, CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN, MIPS_CODE, "MIPS-32 (Big-endian)", None),
         (CS_ARCH_MIPS, CS_MODE_MIPS64 + CS_MODE_LITTLE_ENDIAN, MIPS_CODE2, "MIPS-64-EL (Little-endian)", None),
         (CS_ARCH_MIPS, CS_MODE_MIPS32R6 + CS_MODE_MICRO + CS_MODE_BIG_ENDIAN, MIPS_32R6M, "MIPS-32R6 | Micro (Big-endian)", None),

diff --git a/bindings/python/test_iter.py b/bindings/python/test_iter.py
@@ -45,7 +45,7 @@
         (CS_ARCH_MIPS, CS_MODE_MIPS64 + CS_MODE_LITTLE_ENDIAN, MIPS_CODE2, "MIPS-64-EL (Little-endian)", None),
         (CS_ARCH_MIPS, CS_MODE_MIPS32R6 + CS_MODE_MICRO + CS_MODE_BIG_ENDIAN, MIPS_32R6M, "MIPS-32R6 | Micro (Big-endian)", None),
         (CS_ARCH_MIPS, CS_MODE_MIPS32R6 + CS_MODE_BIG_ENDIAN, MIPS_32R6, "MIPS-32R6 (Big-endian)", None),
-        (CS_ARCH_AARCH64, CS_MODE_ARM, AARCH64_CODE, "ARM-64", None),
+        (CS_ARCH_AARCH64, CS_MODE_ARM, AARCH64_CODE, "AARCH64", None),
         (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, PPC_CODE, "PPC-64", None),
         (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, PPC_CODE, "PPC-64, print register with number only", CS_OPT_SYNTAX_NOREGNAME),
         (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN + CS_MODE_QPX, PPC_CODE2, "PPC-64 + QPX", CS_OPT_SYNTAX_NOREGNAME),

diff --git a/bindings/python/test_lite.py b/bindings/python/test_lite.py
@@ -45,7 +45,7 @@
         (CS_ARCH_MIPS, CS_MODE_MIPS64 + CS_MODE_LITTLE_ENDIAN, MIPS_CODE2, "MIPS-64-EL (Little-endian)", None),
         (CS_ARCH_MIPS, CS_MODE_MIPS32R6 + CS_MODE_MICRO + CS_MODE_BIG_ENDIAN, MIPS_32R6M, "MIPS-32R6 | Micro (Big-endian)", None),
         (CS_ARCH_MIPS, CS_MODE_MIPS32R6 + CS_MODE_BIG_ENDIAN, MIPS_32R6, "MIPS-32R6 (Big-endian)", None),
-        (CS_ARCH_AARCH64, CS_MODE_ARM, AARCH64_CODE, "ARM-64", None),
+        (CS_ARCH_AARCH64, CS_MODE_ARM, AARCH64_CODE, "AARCH64", None),
         (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, PPC_CODE, "PPC-64", None),
         (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, PPC_CODE, "PPC-64, print register with number only", CS_OPT_SYNTAX_NOREGNAME),
         (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN + CS_MODE_QPX, PPC_CODE2, "PPC-64 + QPX", CS_OPT_SYNTAX_NOREGNAME),

diff --git a/suite/benchmark.py b/suite/benchmark.py
@@ -30,7 +30,7 @@
         (CS_ARCH_ARM, CS_MODE_THUMB, "THUMB (ARM)", 0),
         (CS_ARCH_MIPS, CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN, "MIPS-32 (Big-endian)", 0),
         (CS_ARCH_MIPS, CS_MODE_MIPS64 + CS_MODE_LITTLE_ENDIAN, "MIPS-64-EL (Little-endian)", 0),
-        (CS_ARCH_ARM64, CS_MODE_ARM, "ARM-64 (AArch64)", 0),
+        (CS_ARCH_AARCH64, CS_MODE_ARM, "ARM-64 (AArch64)", 0),
         (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, "PPC", 0),
         (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, "PPC, print register with number only", CS_OPT_SYNTAX_NOREGNAME),
         (CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, "Sparc", 0),

diff --git a/suite/capstone_get_setup.c b/suite/capstone_get_setup.c
@@ -22,7 +22,7 @@ int main()
 	if (cs_support(CS_ARCH_ARM)) {
 		printf("arm=1 ");
 	}
-	if (cs_support(CS_ARCH_ARM64)) {
+	if (cs_support(CS_ARCH_AARCH64)) {
 		printf("arm64=1 ");
 	}
 	if (cs_support(CS_ARCH_MIPS)) {

diff --git a/suite/disasm_mc.py b/suite/disasm_mc.py
@@ -41,7 +41,7 @@ def test_file(fname):
 
     archs = {
         "CS_ARCH_ARM": CS_ARCH_ARM,
-        "CS_ARCH_ARM64": CS_ARCH_ARM64,
+        "CS_ARCH_AARCH64": CS_ARCH_AARCH64,
         "CS_ARCH_MIPS": CS_ARCH_MIPS,
         "CS_ARCH_PPC": CS_ARCH_PPC,
         "CS_ARCH_SPARC": CS_ARCH_SPARC,
@@ -93,7 +93,7 @@ def test_file(fname):
         ("CS_ARCH_ARM", "CS_MODE_ARM+CS_MODE_V8"): ['-triple=armv8'],
         ("CS_ARCH_ARM", "CS_MODE_THUMB+CS_MODE_V8"): ['-triple=thumbv8'],
         ("CS_ARCH_ARM", "CS_MODE_THUMB+CS_MODE_MCLASS"): ['-triple=thumbv7m'],
-        ("CS_ARCH_ARM64", "0"): ['-triple=aarch64'],
+        ("CS_ARCH_AARCH64", "0"): ['-triple=aarch64'],
         ("CS_ARCH_MIPS", "CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN"): ['-triple=mips'],
         ("CS_ARCH_MIPS", "CS_MODE_MIPS32+CS_MODE_MICRO"): ['-triple=mipsel', '-mattr=+micromips'],
         ("CS_ARCH_MIPS", "CS_MODE_MIPS64"): ['-triple=mips64el'],

diff --git a/suite/fuzz.py b/suite/fuzz.py
@@ -8,7 +8,7 @@
 # ./suite/fuzz.py x86-32   --> Fuzz X86-32 arch only
 # ./suite/fuzz.py x86-64   --> Fuzz X86-64 arch only
 # ./suite/fuzz.py arm      --> Fuzz all ARM (arm, thumb)
-# ./suite/fuzz.py aarch64  --> Fuzz ARM-64
+# ./suite/fuzz.py aarch64  --> Fuzz AARCH64
 # ./suite/fuzz.py mips     --> Fuzz all Mips (32bit, 64bit)
 # ./suite/fuzz.py ppc      --> Fuzz PPC
 
@@ -36,7 +36,7 @@
         (CS_ARCH_ARM, CS_MODE_THUMB, "THUMB (ARM)", 0),
         (CS_ARCH_MIPS, CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN, "MIPS-32 (Big-endian)", 0),
         (CS_ARCH_MIPS, CS_MODE_MIPS64 + CS_MODE_LITTLE_ENDIAN, "MIPS-64-EL (Little-endian)", 0),
-        (CS_ARCH_ARM64, CS_MODE_ARM, "ARM-64 (AArch64)", 0),
+        (CS_ARCH_AARCH64, CS_MODE_ARM, "AARCH64 (AArch64)", 0),
         (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, "PPC", 0),
         (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, "PPC, print register with number only", CS_OPT_SYNTAX_NOREGNAME),
         (CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, "Sparc", 0),

diff --git a/suite/test_corpus.py b/suite/test_corpus.py
@@ -81,7 +81,7 @@ def test_file(fname):
         ("CS_ARCH_ARM", "CS_MODE_THUMB+CS_MODE_V8"): 5,
         ("CS_ARCH_ARM", "CS_MODE_THUMB+CS_MODE_MCLASS"): 6,
         ("CS_ARCH_ARM", "CS_MODE_THUMB+CS_MODE_V8+CS_MODE_MCLASS"): 7,
-        ("CS_ARCH_ARM64", "0"): 8,
+        ("CS_ARCH_AARCH64", "0"): 8,
         ("CS_ARCH_MIPS", "CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN"): 9,
         ("CS_ARCH_MIPS", "CS_MODE_MIPS32+CS_MODE_MICRO"): 10,
         ("CS_ARCH_MIPS", "CS_MODE_MIPS64"): 11,

diff --git a/suite/test_corpus3.py b/suite/test_corpus3.py
@@ -34,7 +34,7 @@ def test_file(fname):
 
     archs = {
         "CS_ARCH_ARM": CS_ARCH_ARM,
-        "CS_ARCH_ARM64": CS_ARCH_ARM64,
+        "CS_ARCH_AARCH64": CS_ARCH_AARCH64,
         "CS_ARCH_MIPS": CS_ARCH_MIPS,
         "CS_ARCH_PPC": CS_ARCH_PPC,
         "CS_ARCH_SPARC": CS_ARCH_SPARC,
@@ -91,7 +91,7 @@ def test_file(fname):
         ("CS_ARCH_ARM", "CS_MODE_THUMB+CS_MODE_V8"): 5,
         ("CS_ARCH_ARM", "CS_MODE_THUMB+CS_MODE_MCLASS"): 6,
         ("CS_ARCH_ARM", "CS_MODE_THUMB+CS_MODE_V8+CS_MODE_MCLASS"): 7,
-        ("CS_ARCH_ARM64", "0"): 8,
+        ("CS_ARCH_AARCH64", "0"): 8,
         ("CS_ARCH_MIPS", "CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN"): 9,
         ("CS_ARCH_MIPS", "CS_MODE_MIPS32+CS_MODE_MICRO"): 10,
         ("CS_ARCH_MIPS", "CS_MODE_MIPS64"): 11,

diff --git a/suite/test_group_name.py b/suite/test_group_name.py
@@ -70,16 +70,16 @@ def run(self):
 }
 
 arm64_dict = {
-    ARM64_GRP_JUMP: "jump",
-    ARM64_GRP_CALL: "call",
-    ARM64_GRP_RET: "return",
-    ARM64_GRP_INT: "int",
-    ARM64_GRP_PRIVILEGE: "privilege",
+    AARCH64_GRP_JUMP: "jump",
+    AARCH64_GRP_CALL: "call",
+    AARCH64_GRP_RET: "return",
+    AARCH64_GRP_INT: "int",
+    AARCH64_GRP_PRIVILEGE: "privilege",
 
-    ARM64_GRP_CRYPTO: "crypto",
-    ARM64_GRP_FPARMV8: "fparmv8",
-    ARM64_GRP_NEON: "neon",
-    ARM64_GRP_CRC: "crc"
+    AARCH64_GRP_CRYPTO: "crypto",
+    AARCH64_GRP_FPARMV8: "fparmv8",
+    AARCH64_GRP_NEON: "neon",
+    AARCH64_GRP_CRC: "crc"
 }
 
 mips_dict = {
@@ -260,7 +260,7 @@ def run(self):
 
 tests = [
     GroupTest('arm', CS_ARCH_ARM, CS_MODE_THUMB, arm_dict),
-    GroupTest('arm64', CS_ARCH_ARM64, CS_MODE_ARM, arm64_dict),
+    GroupTest('arm64', CS_ARCH_AARCH64, CS_MODE_ARM, arm64_dict),
     GroupTest('mips', CS_ARCH_MIPS, CS_MODE_MIPS32 | CS_MODE_BIG_ENDIAN, mips_dict),
     GroupTest('ppc', CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, ppc_dict),
     GroupTest('sparc', CS_ARCH_SPARC, CS_MODE_BIG_ENDIAN, sparc_dict),

diff --git a/suite/test_mc.py b/suite/test_mc.py
@@ -33,7 +33,7 @@ def normalize(text):
             i = text.find('# ')
             if i != -1:
                 return text[:i].strip()
-        if arch == CS_ARCH_ARM64:
+        if arch == CS_ARCH_AARCH64:
             # remove comment after #
             i = text.find('// ')
             if i != -1:
@@ -84,7 +84,7 @@ def test_file(fname):
 
     archs = {
         "CS_ARCH_ARM": CS_ARCH_ARM,
-        "CS_ARCH_ARM64": CS_ARCH_ARM64,
+        "CS_ARCH_AARCH64": CS_ARCH_AARCH64,
         "CS_ARCH_MIPS": CS_ARCH_MIPS,
         "CS_ARCH_PPC": CS_ARCH_PPC,
         "CS_ARCH_SPARC": CS_ARCH_SPARC,
@@ -136,7 +136,7 @@ def test_file(fname):
         ("CS_ARCH_ARM", "CS_MODE_ARM+CS_MODE_V8"): ['-triple=armv8'],
         ("CS_ARCH_ARM", "CS_MODE_THUMB+CS_MODE_V8"): ['-triple=thumbv8'],
         ("CS_ARCH_ARM", "CS_MODE_THUMB+CS_MODE_MCLASS"): ['-triple=thumbv7m'],
-        ("CS_ARCH_ARM64", "0"): ['-triple=aarch64'],
+        ("CS_ARCH_AARCH64", "0"): ['-triple=aarch64'],
         ("CS_ARCH_MIPS", "CS_MODE_MIPS32+CS_MODE_BIG_ENDIAN"): ['-triple=mips'],
         ("CS_ARCH_MIPS", "CS_MODE_MIPS32+CS_MODE_MICRO"): ['-triple=mipsel', '-mattr=+micromips'],
         ("CS_ARCH_MIPS", "CS_MODE_MIPS64"): ['-triple=mips64el'],

diff --git a/tests/test_detail.c b/tests/test_detail.c
@@ -162,7 +162,7 @@ static void test()
 			CS_MODE_ARM,
 			(unsigned char *)ARM64_CODE,
 			sizeof(ARM64_CODE) - 1,
-			"ARM-64"
+			"AARCH64"
 		},
 #endif
 #ifdef CAPSTONE_HAS_MIPS