ARM: Incorrect register access information for B and BL

[Dil4rd]

For ARM branch instructions there is no pc register in the list of accessed for write registers.

According to ARM asm manual branch, instructions like b and bl have syntax
B{L}{cond} label where "label is a program-relative expression".
This means that pc regiter should always be in list of accessed for read registers.
And, obviously, pc should be in list of accessed for write registers.

P.S. I don't check this for BX, BLX and BXJ instructions, but they can be also affected.

Example 1

It's obvious that for beq #0x90 the pc register will be read and written (to make smth like pc = pc + CONST) if zero flag is set.
But we have empty lists:

0x5c:   0B 00 00 0A beq #0x90
    implicit_regs_read = []
    implicit_regs_write = []
    regs_read = []
    regs_write = []
    op_count: 1
        operands[0].type: IMM = 0x90
    Code condition: 1

Actual

Read:

Written:

Expected

Read: pc

Written: pc

Example 2

For bl instructions pc register should also be in regs_write list of accessed registers.

0x190:  C5 2D 05 EB bl  #0x14b8ac
    implicit_regs_read = [u'pc']
    implicit_regs_write = [u'lr']
    regs_read = [u'pc']
    regs_write = [u'lr']
    op_count: 1
        operands[0].type: IMM = 0x14b8ac

Actual

Read: pc

Written: lr

Expected

Read: pc

Written: lr, pc

[aquynh]

fixed now, please confirm

[Dil4rd]

Yes, fixed. Thanks!