Avoid random access values for operands in not-yet-specified instructions. #2259
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Thank you, can you plz also add a minor PoC in |
| @@ -16915,7 +16915,7 @@ | |||
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| { /* X86_VCMPSSZrr_Int, X86_INS_VCMP: vcmp */ | |||
| 0, | |||
| { 0 } | |||
| { CS_AC_WRITE, CS_AC_READ, CS_AC_READ, 0 } | |||
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I have added the regression test along with this change, which only fixes the rr variant of vcmpunordss. Let me know if these access values can also be generated by tablegen.
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I think the access details can be generated. But x86 is not "officially" supported by auto-sync currently.
But the access information should theoretically generate fine.
You need to build our llvm-tblgen (see docs) and run
llvm-tblgen --gen-asm-matcher --printerLang=CCS -I ./llvm/lib/Target/X86/ -I ./llvm/include/ ./llvm/lib/Target/X86/X86.td
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If you still want to generate these things, please do it in another PR. So it is nicely distinct from the changes here.
done |
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Thank you! Merged. |
See description in #2258