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🎨 pre-commit fixes
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pre-commit-ci[bot] committed Jul 1, 2024
1 parent 1ed657f commit b02df07
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Showing 3 changed files with 6 additions and 6 deletions.
2 changes: 1 addition & 1 deletion include/core/syrec/program.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -14,7 +14,7 @@ namespace syrec {

struct ReadProgramSettings {
explicit ReadProgramSettings(unsigned bitwidth = 32U):
defaultBitwidth(bitwidth){};
defaultBitwidth(bitwidth) {};
unsigned defaultBitwidth;
};

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6 changes: 3 additions & 3 deletions src/mqt/syrec/__init__.py
Original file line number Diff line number Diff line change
Expand Up @@ -21,15 +21,15 @@
)

__all__ = [
"__version__",
"bitset",
"circuit",
"cost_aware_synthesis",
"gate",
"gate_type",
"line_aware_synthesis",
"program",
"properties",
"read_program_settings",
"simple_simulation",
"cost_aware_synthesis",
"line_aware_synthesis",
"__version__",
]
4 changes: 2 additions & 2 deletions src/mqt/syrec/syrec_editor.py
Original file line number Diff line number Diff line change
Expand Up @@ -319,7 +319,7 @@ def sim(self):

for i in self.circ.constants:
if i is None:
bit_mask = bit_mask + 2**bit_pos
bit_mask += 2**bit_pos

bit_pos += 1

Expand All @@ -329,7 +329,7 @@ def sim(self):

for i, constant in enumerate(self.circ.constants):
if constant:
bit1_mask = bit1_mask + 2**i
bit1_mask += 2**i

input_list = [i + bit1_mask for i in input_list]

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