refactor: split interrupts, use v0.2.0 rt

ch32-rs · May 10, 2024 · 2f7df22 · 2f7df22
1 parent 36a8013
commit 2f7df22
Showing 1 changed file with 14 additions and 1 deletion.
diff --git a/ch32-metapac-gen/src/lib.rs b/ch32-metapac-gen/src/lib.rs
@@ -188,7 +188,10 @@ impl Gen {
         let data = data.replace("cortex_m", "riscv"); // FIXME
 
         // match riscv-rt interrupt name
-        let data = data.replace(".vector_table.interrupts", ".vector_table.external_interrupts");
+        let data = data.replace(
+            ".vector_table.interrupts",
+            ".vector_table.external_interrupts",
+        );
         let data = data.replace("__INTERRUPTS", "__EXTERNAL_INTERRUPTS");
         // trim system vector, 0 to 15
         // [Vector { _reserved : 0 } , Vector { _reserved : 0 } , Vector { _reserved : 0 }  ...
@@ -198,6 +201,16 @@ impl Gen {
         if data.contains("[Vector { _reserved : 0 }") {
             panic!("Unexpected Vector 16 {{ _reserved : 0 }}");
         }
+        // Fix vector size: : [Vector; (\d+)] =
+        let data = Regex::new(r#": \[Vector ; (\d+)\]"#).unwrap().replace_all(
+            &data,
+            |caps: &regex::Captures| {
+                format!(
+                    ": [Vector ; {}]",
+                    caps.get(1).unwrap().as_str().parse::<usize>().unwrap() - 16
+                )
+            },
+        );
 
         // Remove inner attributes like #![no_std]
         let data = Regex::new("# *! *\\[.*\\]").unwrap().replace_all(&data, "");