chiplicity
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swerv_eh1
swerv_eh1 PublicForked from westerndigitalcorporation/swerv_eh1
A directory of Western Digital’s RISC-V SweRV Cores
SystemVerilog 1
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Cores-SweRV
Cores-SweRV PublicForked from chipsalliance/Cores-VeeR-EH1
SweRV EH1 core
SystemVerilog 1
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caravel_swerv-el2
caravel_swerv-el2 PublicForked from efabless/caravel_mpw-one
Caravel is a standard SoC hardness with on chip resources to control and read/write operations from a user-dedicated space.
Verilog 1
Repositories
- chiplicity.github.io Public
chiplicity/chiplicity.github.io’s past year of commit activity - iic-osic-tools Public Forked from iic-jku/IIC-OSIC-TOOLS
IIC-OSIC-TOOLS is an all-in-one Docker container for SKY130-based analog and digital chip design. It runs on x86_64/amd64 and aarch64/arm64.
chiplicity/iic-osic-tools’s past year of commit activity - caravel_swerv-el2 Public Forked from efabless/caravel_mpw-one
Caravel is a standard SoC hardness with on chip resources to control and read/write operations from a user-dedicated space.
chiplicity/caravel_swerv-el2’s past year of commit activity - verible Public Forked from chipsalliance/verible
Verible provides a SystemVerilog parser, style-linter, and formatter.
chiplicity/verible’s past year of commit activity - gdshelpers Public Forked from HelgeGehring/gdshelpers
GDSHelpers is an open-source package for automatized pattern generation for nano-structuring.
chiplicity/gdshelpers’s past year of commit activity
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