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Update internal Pipe wiring - fixes #615" (#616)
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Replace ambiguous bi-connect ("<>") with mono-connect (":=") for internal Pipe wiring.
(cherry picked from commit 0d121a2)

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ucbjrl committed May 25, 2017
1 parent 63182ed commit fb9644d
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Showing 3 changed files with 18 additions and 4 deletions.
2 changes: 1 addition & 1 deletion build.sbt
Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,7 @@ lazy val customUnidocSettings = unidocSettings ++ Seq (

lazy val commonSettings = Seq (
organization := "edu.berkeley.cs",
version := "3.0-SNAPSHOT_2017-05-16",
version := "3.0-SNAPSHOT_2017-05-25",
git.remoteRepo := "git@github.com:ucb-bar/chisel3.git",
scalaVersion := "2.11.7",
autoAPIMappings := true,
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4 changes: 2 additions & 2 deletions src/main/scala/chisel3/util/Valid.scala
Original file line number Diff line number Diff line change
Expand Up @@ -38,8 +38,8 @@ object Pipe
def apply[T <: Data](enqValid: Bool, enqBits: T, latency: Int)(implicit compileOptions: CompileOptions): Valid[T] = {
if (latency == 0) {
val out = Wire(Valid(enqBits))
out.valid <> enqValid
out.bits <> enqBits
out.valid := enqValid
out.bits := enqBits
out
} else {
val v = RegNext(enqValid, false.B)
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16 changes: 15 additions & 1 deletion src/test/scala/chiselTests/ConnectSpec.scala
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
package chiselTests

import chisel3._
import chisel3.experimental.{FixedPoint, Analog}
import chisel3.experimental.{Analog, FixedPoint}
import chisel3.testers.BasicTester

abstract class CrossCheck extends Bundle {
Expand All @@ -19,6 +19,17 @@ class CrossConnects(inType: Data, outType: Data) extends Module {
io.out := io.in
}

class PipeInternalWires extends Module {
import chisel3.util.Pipe
val io = IO(new Bundle {
val a = Input(Bool())
val b = Input(UInt(32.W))
})
val pipe = Module(new Pipe(UInt(32.W), 32))
pipe.io.enq.valid <> io.a
pipe.io.enq.bits <> io.b
}

class CrossConnectTester(inType: Data, outType: Data) extends BasicTester {
val dut = Module(new CrossConnects(inType, outType))
stop()
Expand Down Expand Up @@ -82,4 +93,7 @@ class ConnectSpec extends ChiselPropSpec {
property("SInt := Analog should fail") {
intercept[ChiselException]{ new CrossConnectTester(SInt(16.W), Analog(16.W)) }
}
property("Pipe internal connections should succeed") {
elaborate( new PipeInternalWires)
}
}

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