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Add requirements to Queue class #1176

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merged 3 commits into from
Sep 13, 2019
Merged

Add requirements to Queue class #1176

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3cc4487
Add requirements to Queue class
jackkoenig Sep 12, 2019
7275079
Further Queue requirement improvements
jackkoenig Sep 12, 2019
d4b1ddf
Merge branch 'master' into queue-requirements
jackkoenig Sep 13, 2019
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8 changes: 4 additions & 4 deletions src/main/scala/chisel3/util/Decoupled.scala
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Original file line number Diff line number Diff line change
Expand Up @@ -191,7 +191,8 @@ class Queue[T <: Data](gen: T,
flow: Boolean = false)
(implicit compileOptions: chisel3.CompileOptions)
extends Module() {

require(entries > -1, "Queue must have non-negative number of entries")
require(entries != 0, "Use companion object Queue.apply for zero entries")
val genType = if (compileOptions.declaredTypeMustBeUnbound) {
requireIsChiselType(gen)
gen
Expand Down Expand Up @@ -283,7 +284,6 @@ object Queue
enq.ready := deq.ready
deq
} else {
require(entries > 0)
val q = Module(new Queue(chiselTypeOf(enq.bits), entries, pipe, flow))
q.io.enq.valid := enq.valid // not using <> so that override is allowed
q.io.enq.bits := enq.bits
Expand All @@ -302,9 +302,9 @@ object Queue
enq: ReadyValidIO[T],
entries: Int = 2,
pipe: Boolean = false,
flow: Boolean = false): IrrevocableIO[T] = {
require(entries > 0) // Zero-entry queues don't guarantee Irrevocability
flow: Boolean = false): IrrevocableIO[T] = {
val deq = apply(enq, entries, pipe, flow)
require(entries > 0, "Zero-entry queues don't guarantee Irrevocability")
val irr = Wire(new IrrevocableIO(deq.bits))
irr.bits := deq.bits
irr.valid := deq.valid
Expand Down