Add custom mdoc modifier for emitted Verilog

[jackkoenig]

This adds a custom mdoc modifier for wrapping emitted Verilog examples in syntax highlightable markdown code blocks.

Example Before

Example After

Contributor Checklist

• Did you add Scaladoc to every public function/method?
• Did you add at least one test demonstrating the PR?
• Did you delete any extraneous printlns/debugging code?
• Did you specify the type of improvement?
• Did you add appropriate documentation in docs/src?
• Did you state the API impact?
• Did you specify the code generation impact?
• Did you request a desired merge strategy?
• Did you add text to be included in the Release Notes for this change?

Type of Improvement

• documentation
• code cleanup
• new feature/API

API Impact

Adds documentation API to mdoc: mdoc:verilog modifier

Backend Code Generation Impact

No impact

Desired Merge Strategy

squash

Release Notes

Add Verilog syntax highlighting to documentation examples

Reviewer Checklist (only modified by reviewer)

• Did you add the appropriate labels?
• Did you mark the proper milestone (3.2.x, 3.3.x, 3.4.0, 3.5.0) ?
• Did you review?
• Did you check whether all relevant Contributor checkboxes have been checked?
• Did you mark as Please Merge?

[seldridge]

Awesome!

[mwachs5]

❤️