Priv 1.12: PTW page fault instead of access exception if PTE reserved bit set #2913
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Related issue: resolves #2795
needs riscv-software-src/riscv-isa-sim#874 and riscv-software-src/riscv-isa-sim#875 to fully correctly match RTL behavior.
Type of change: feature request
Impact: API modification
Development Phase: proposal
Release Notes
PTE_RSVD
was introduced into Spike in riscv-software-src/riscv-isa-sim#750Reserved PTE bits report page fault instead of access exception.
Add an additional bit
pf
toPTWResp
andTLBEntryData
to pipe this through.