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Merge pull request #6314 from chipsalliance/dependabot/submodules/thi…
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…rd_party/tools/circt-verilog-eff08d4

build(deps): bump third_party/tools/circt-verilog from `efca772` to `eff08d4`
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github-actions[bot] authored Oct 23, 2024
2 parents 5451765 + bdf19d0 commit c7cb134
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion third_party/tools/circt-verilog
Submodule circt-verilog updated 3 files
+1 −1 lib/Dialect/FIRRTL/Transforms/AdvancedLayerSink.cpp
+31 −52 lib/Dialect/FIRRTL/Transforms/CreateSiFiveMetadata.cpp
+324 −60 test/Dialect/FIRRTL/emit-metadata.mlir

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