Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Fixed little endian (and scaling/offset) #65

Merged
merged 2 commits into from
Mar 2, 2017
Merged
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
18 changes: 13 additions & 5 deletions common/dbc.py
Original file line number Diff line number Diff line change
Expand Up @@ -134,6 +134,10 @@ def decode(self, x, arr=None, debug=False):

Returns (None, None) if the message could not be decoded.
"""

def swap_order(d, wsz=4, gsz=2 ):
return "".join(["".join([m[i:i+gsz] for i in range(wsz-gsz,-gsz,-gsz)]) for m in [d[i:i+wsz] for i in range(0,len(d),wsz)]])

if arr is None:
out = {}
else:
Expand All @@ -151,7 +155,6 @@ def decode(self, x, arr=None, debug=False):
print name

blen = 8*len(x[2])
x2_int = int(hexlify(x[2]), 16)

for s in msg[1]:
if arr is not None and s[0] not in arr:
Expand All @@ -161,10 +164,14 @@ def decode(self, x, arr=None, debug=False):
# see http://vi-firmware.openxcplatform.com/en/master/config/bit-numbering.html
if s[3] is False:
ss = self.bits.index(s[1])
x2_int = int(hexlify(x[2]), 16)
data_bit_pos = (blen - (ss + s[2]))
else:
x2_int = int(swap_order(hexlify(x[2]), 16, 2), 16)
ss = s[1]
data_bit_pos = ss

data_bit_pos = (blen - (ss + s[2]))

if data_bit_pos < 0:
continue
ival = (x2_int >> data_bit_pos) & ((1 << (s[2])) - 1)
Expand All @@ -173,12 +180,13 @@ def decode(self, x, arr=None, debug=False):
ival -= (1<<s[2])

# control the offset
ival = (ival + s[6])*s[5]
if debug:
print "%40s %2d %2d %7.2f %s" % (s[0], s[1], s[2], ival, s[-1])
ival = (ival * s[5]) + s[6]
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Wow, how did this work before?

Copy link

@TheMutley TheMutley Mar 1, 2017

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

It worked only because almost all the signals in the Acura dbc had their offsets at zero!

#if debug:
# print "%40s %2d %2d %7.2f %s" % (s[0], s[1], s[2], ival, s[-1])

if arr is None:
out[s[0]] = ival
else:
out[arr.index(s[0])] = ival
return name, out