[AMDGPU] Remove "amdgpu-enable-structurizer-workarounds" flag (llvm#1…

…05819)
dmpolukhin · Sep 2, 2024 · 9517df4 · 9517df4
1 parent e34ed1c
commit 9517df4
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Showing 2 changed files with 4 additions and 20 deletions.
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -338,12 +338,6 @@ static cl::opt<bool> EnableScalarIRPasses(
   cl::init(true),
   cl::Hidden);
 
-static cl::opt<bool, true> EnableStructurizerWorkarounds(
-    "amdgpu-enable-structurizer-workarounds",
-    cl::desc("Enable workarounds for the StructurizeCFG pass"),
-    cl::location(AMDGPUTargetMachine::EnableStructurizerWorkarounds),
-    cl::init(true), cl::Hidden);
-
 static cl::opt<bool, true> EnableLowerModuleLDS(
     "amdgpu-enable-lower-module-lds", cl::desc("Enable lower module lds pass"),
     cl::location(AMDGPUTargetMachine::EnableLowerModuleLDS), cl::init(true),
@@ -615,7 +609,6 @@ AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T, const Triple &TT,
 
 bool AMDGPUTargetMachine::EnableFunctionCalls = false;
 bool AMDGPUTargetMachine::EnableLowerModuleLDS = true;
-bool AMDGPUTargetMachine::EnableStructurizerWorkarounds = true;
 
 AMDGPUTargetMachine::~AMDGPUTargetMachine() = default;
 
@@ -1231,10 +1224,8 @@ bool GCNPassConfig::addPreISel() {
   // Merge divergent exit nodes. StructurizeCFG won't recognize the multi-exit
   // regions formed by them.
   addPass(&AMDGPUUnifyDivergentExitNodesID);
-  if (EnableStructurizerWorkarounds) {
-    addPass(createFixIrreduciblePass());
-    addPass(createUnifyLoopExitsPass());
-  }
+  addPass(createFixIrreduciblePass());
+  addPass(createUnifyLoopExitsPass());
   addPass(createStructurizeCFGPass(false)); // true -> SkipUniformRegions
 
   addPass(createAMDGPUAnnotateUniformValuesLegacy());
@@ -1853,8 +1844,6 @@ void AMDGPUCodeGenPassBuilder::addCodeGenPrepare(AddIRPass &addPass) const {
 }
 
 void AMDGPUCodeGenPassBuilder::addPreISel(AddIRPass &addPass) const {
-  const bool EnableStructurizerWorkarounds =
-      AMDGPUTargetMachine::EnableStructurizerWorkarounds;
 
   if (TM.getOptLevel() > CodeGenOptLevel::None)
     addPass(FlattenCFGPass());
@@ -1868,12 +1857,8 @@ void AMDGPUCodeGenPassBuilder::addPreISel(AddIRPass &addPass) const {
   // regions formed by them.
 
   addPass(AMDGPUUnifyDivergentExitNodesPass());
-
-  if (EnableStructurizerWorkarounds) {
-    addPass(FixIrreduciblePass());
-    addPass(UnifyLoopExitsPass());
-  }
-
+  addPass(FixIrreduciblePass());
+  addPass(UnifyLoopExitsPass());
   addPass(StructurizeCFGPass(/*SkipUniformRegions=*/false));
 
   addPass(AMDGPUAnnotateUniformValuesPass());

diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
@@ -38,7 +38,6 @@ class AMDGPUTargetMachine : public LLVMTargetMachine {
 public:
   static bool EnableFunctionCalls;
   static bool EnableLowerModuleLDS;
-  static bool EnableStructurizerWorkarounds;
 
   AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
                       StringRef FS, const TargetOptions &Options,