Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

arm64: fixes around icache flushing #4204

Merged
merged 2 commits into from
Sep 10, 2016

Conversation

lewurm
Copy link
Contributor

@lewurm lewurm commented Sep 9, 2016

The first hit on Google about "Exynos 8890 SIGILL" is a thread pointing out a dolphin crash on Samsung Galaxy S7. We had a similar issue in mono, see mono/mono#3549

Untested though: Anyone cares about testing it please?


This change is Reviewable

@hrydgard
Copy link
Contributor

hrydgard commented Sep 9, 2016

So THAT's what it is, thank you! Same issue in PPSSPP, we "solved" it with terrifying amounts of padding.

#endif
/* Don't rely on GCC's __clear_cache implementation, as it caches
* icache/dcache cache line sizes, that can vary between cores on
* big.LITTLE architectures. */

This comment was marked as off-topic.

This comment was marked as off-topic.

@lewurm lewurm force-pushed the arm64-icache-big-little-fix branch from e7acee0 to 8f4f8a4 Compare September 9, 2016 23:47
@skidau
Copy link
Contributor

skidau commented Sep 9, 2016

@lewurm lewurm force-pushed the arm64-icache-big-little-fix branch from 8f4f8a4 to 0248ace Compare September 9, 2016 23:53
@lewurm
Copy link
Contributor Author

lewurm commented Sep 9, 2016

Thanks @skidau, fixed it up.

@PatrickFerry
Copy link
Member

@lewurm lewurm force-pushed the arm64-icache-big-little-fix branch from 0248ace to ce87586 Compare September 10, 2016 00:22
@lewurm
Copy link
Contributor Author

lewurm commented Sep 10, 2016

fixed lint issues. Great CI setup btw!

@skidau
Copy link
Contributor

skidau commented Sep 10, 2016

Tested this out and it works for me on a S7 Exynos.

@lewurm lewurm force-pushed the arm64-icache-big-little-fix branch from ce87586 to fff8221 Compare September 10, 2016 00:31
@lewurm
Copy link
Contributor Author

lewurm commented Sep 10, 2016

okay, one more try on the linter :)


addr = (u64)start & ~(u64)(dsize - 1);
for (; addr < (u64)end; addr += dsize)
__asm__ volatile("dc civac, %0" : : "r"(addr) : "memory");

This comment was marked as off-topic.

This comment was marked as off-topic.

@degasus
Copy link
Member

degasus commented Sep 10, 2016

IminLine: Log2 of the number of words in the smallest cache line of all the instruction caches that are
controlled by the processor.

Not sure about processor != core, but this might still be a Exynos bug.

Also no clue which one is better, CVAU or CIVAC. Both LGTM.

@degasus
Copy link
Member

degasus commented Sep 10, 2016

Reviewed 1 of 1 files at r3.
Review status: all files reviewed at latest revision, 1 unresolved discussion.


Comments from Reviewable

@degasus degasus merged commit 077fa09 into dolphin-emu:master Sep 10, 2016
@degasus
Copy link
Member

degasus commented Sep 10, 2016

Thanks for sharing the outcome :D

hrydgard added a commit to hrydgard/ppsspp that referenced this pull request Sep 10, 2016
@dolphin-emu-bot
Copy link
Contributor

FifoCI detected that this change impacts graphical rendering. Here are the behavior differences detected by the system:

  • rs3-bumpmapping on dx-win-nv: diff

automated-fifoci-reporter

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Development

Successfully merging this pull request may close these issues.

6 participants